Method for the manufacture of a semiconductor device and a semiconductor device obtained through it
The invention relates to a semiconductor device ( 10 ) having a semiconductor body ( 2 ), comprising a field effect transistor, a first gate dielectric ( 6 A) being formed on a first surface at the location of the channel region ( 5 ) and on it a first gate electrode ( 7 ), a sunken ion implantation ( 20 ) being executed from the first side of the semiconductor body ( 2 ) through and on both sides of the first gate electrode ( 7 ), which implantation results in a change of property of the silicon below the first gate electrode ( 7 ) compared to the silicon on both sides of the gate electrode 7 ) in a section of the channel region ( 5 ) remote from the first gate dielectric ( 6 A), and on the second surface of the semiconductor body ( 2 ) a cavity ( 30 ) being provided therein by means of selective etching while use is made of the change of property of the silicon. A second gate ( 6 B, 8 ) is deposited in the cavity thus formed. Before the ion implantation ( 20 ), a mask (M 1 ) is formed on both sides of the gate electrode ( 7 ) and at a distance thereof, whereby after the ion implantation ( 20 ) at the location of the mask (M 1 ) also a change in property of the silicon is obtained. In this way the device ( 10 ) can be easily provided with lateral insulation regions. Also the end regions of the gate electrodes ( 7,8 ) can in this way be surrounded by insulation regions.
1. A method for the manufacture of a semiconductor device, the method comprising:
providing a substrate;
forming a first gate dielectric on a first surface of a silicon semiconductor body on the substrate;
forming a first gate electrode on the first gate dielectric;
forming a source region of a field effect transistor and a drain region of the field effect transistor on both sides of the first gate electrode;
providing a mask on both sides of the first gate electrode;
after providing the mask on both sides of the first gate electrode, executing an ion implantation from the first surface of the semiconductor body completely through and beside the first gate electrode;
making a cavity on a second surface of the semiconductor body, wherein the first surface is positioned between the second surface and the substrate;
depositing a second gate dielectric in the cavity; and
forming a second gate electrode on top of the second gate dielectric.
2. A method as claimed in claim 1 further comprising:
prior to making the cavity on the second surface of the semiconductor body, depositing a further mask on the second surface of the semiconductor body;
removing the further mask; and
after removing the further mask, making further cavities in the semiconductor body.
3. A method as claimed in claim 2 further comprising filling the further cavities with an electrically insulating layer.
4. A method as claimed in claim 1 , characterized in that the first and second gate electrodes are formed such that in longitudinal direction seen in projection the first and second gate electrodes have each a non-overlapping part.
5. A method as claimed in claim 1 further comprising prior to making the cavity on the second surface of the semiconductor body, depositing a further mask on the second surface of the semiconductor body.
6. A method as claimed in claim 4 further comprising:
prior to forming the second gate electrode, removing a part of the semiconductor body at the location of the non-overlapping parts of the first and second gate electrodes using the further mask; and
after forming the second gate electrode, removing the remaining part of the semiconductor body.
7. A method as claimed in claim 1 , wherein making the cavity on the second surface of the semiconductor body comprises etching the semiconductor body selectively with respect to silicon crystallinity.
8. A method as claimed in claim 7 , wherein etching the semiconductor body comprises etching the semiconductor body with a wet-chemical etching agent based on hydrogen fluoride or phosphoric acid with oxygen.
9. A method as claimed in claim 1 , wherein executing the ion implantation from the first surface of the semiconductor body through and beside the first gate electrode comprises executing the ion implantation with non-doping ions from the first surface of the semiconductor body through and beside the first gate electrode.
10. A method as claimed in claim 1 , wherein executing the ion implantation with non-doping ions from the first surface of the semiconductor body through and beside the first gate electrode comprising executing the ion implantation with argon ions from the first surface of the semiconductor body through and beside the first gate electrode.
11. A method as claimed in claim 1 , characterized in that silicon at the location of the mask is locally made amorphous by executing the ion implantation.
12. A method as claimed in claim 11 further comprising annealing the amorphous silicon at the location of the mask to partially recrystallize the amorphous silicon.
13. A method as claimed in claim 1 further comprising after forming the first gate electrode, providing a further substrate and an electrically insulating layer to the semiconductor body, wherein the first gate electrode is positioned between the substrate and the further substrate.
14. A method as claimed in claim 1 further comprising providing an electrical connector to the non-overlapping parts of the first and second gate electrodes.