Variable gain amplifier
View Patent ↗A variable gain amplifier includes multiple gain stages. Each gain stage includes a gain transistor and a cascode transistor to form a cascode amplifier, and a current diversion transistor to divert current away from a cascode transistor to reduce gain in the stage. A control circuit is included to maintain substantially constant drain-to-source voltage and drain current in the gain transistor.
1. An amplifier circuit comprising:
a differential pair of transistors, and a first current source transistor coupled to provide drain-to-source current to the differential pair of transistors, the differential pair of transistors coupled to drive first and second intermediate nodes;
a gain transistor and a cascode transistor, the gain transistor having a gate coupled to a signal input node, and the cascode transistor having a gate coupled to the first intermediate node; and
a current diversion transistor coupled to divert current provided by the current source transistor away from the cascode transistor, the current diversion transistor having a gate coupled to the second intermediate node.
2. The amplifier circuit of claim 1 further comprising:
third and fourth transistors having drains coupled together and sources coupled together, the third transistor having a gate coupled to the first intermediate node, and the fourth transistor having a gate coupled to the second intermediate node.
3. The amplifier circuit of claim 2 further comprising a second current source transistor coupled to provide current to the third and fourth transistors, the second current source transistor having a gate coupled to the gate of the gain transistor.
4. The amplifier circuit of claim 3 further comprising a feedback transistor having a gate coupled to drains of the third and fourth transistors, and a source coupled to the gate of the second current source transistor.
5. The amplifier circuit of claim 4 further comprising:
fifth and sixth transistors having drains coupled together and sources coupled together, and having gates coupled to gates of the differential pair of transistors.
6. The amplifier circuit of claim 5 further comprising a third current source transistor coupled to provide current to the fifth and sixth transistors, the third current source transistor having a gate coupled to the gate of the first current source transistor.
7. The amplifier circuit of claim 6 further comprising a second feedback transistor having a gate coupled to drains of the fifth and sixth transistors, and a source coupled to the gate of the third current source transistor.
8. A variable gain amplifier having multiple stages coupled in parallel, wherein each of the multiple stages comprises:
a gain transistor and a cascode transistor configured as a cascode amplifier;
a current diversion transistor to divert current away from the cascode transistor; and
a control circuit coupled to a gate of the gain transistor, a gate of the cascode transistor, and a gate of the current diversion transistor, the control circuit including a feedback loop to reduce voltage variation at a junction between the gain transistor, the cascode transistor and the current diversion transistor.
9. The variable gain amplifier of claim 8 wherein the feedback loop includes first and second transistors having sources coupled together and drains coupled together, the first transistor having a gate coupled to the gate of the cascode transistor and the second transistor having a gate coupled to the gate of the current diversion transistor.
10. The variable gain amplifier of claim 9 wherein the feedback loop further comprises a third transistor coupled to provide current to the first and second transistors, the third transistor having a gate coupled to the gate of the gain transistor.
11. The variable gain amplifier of claim 10 wherein the feedback loop further comprises a fourth transistor having a gate coupled to the drains of the first and second transistors, and a source coupled to the coupled to the gate of the third transistor.
12. The variable gain amplifier of claim 8 wherein each stage further comprises a differential pair of transistors coupled to provide a differential signal to the cascode transistor and the current diversion transistor.
13. The variable gain amplifier of claim 12 wherein each stage further comprises a second control circuit having a feedback loop to reduce voltage variation on a node coupled to sources of the differential pair of transistors.