Split gate type non-volatile semiconductor memory device and method of manufacturing the same

1 . A split gate-type non-volatile semiconductor memory device comprising:

a floating gate having an acute-angled portion between a side surface and an upper surface above a semiconductor substrate;

a control gate provided apart from said floating gate to oppose to said acute-angled portion; and

an insulating portion provided on said floating gate,

wherein a side surface of said insulating portion on a side of said control gate is inclined to a direction apart from said control gate with respect to a vertical line to said semiconductor substrate.

2 . The split gate-type non volatile semiconductor memory device according to claim 1 , wherein said side surface of said insulating portion is terminated at said acute-angled portion.

3 . The split gate-type non volatile semiconductor memory device according to claim 2 , wherein said insulating portion is formed on said floating gate, and

said side surface of said insulating portion on the side of said control gate is opposite to a side surface of said control gate through an insulating film.

4 . A method of manufacturing a split gate-type non volatile semiconductor memory device having a floating gate and a control gate, comprising:

forming a polysilicon film on a semiconductor substrate through a first insulating film;

patterning said polysilicon film by using a mask insulating film as a mask such that said polysilicon film is etched based on a shape of a lower portion of said mask insulating film which is formed on said polysilicon film, wherein said mask insulating film has a side surface inclined in a direction apart from said control gate; and

forming said control gate on said substrate through said second insulating film to oppose to said floating gate through said second insulating film.

5 . The method according to claim 4 , wherein said patterning comprises:

forming a third insulating film on said polysilicon film;

removing a part of said third insulating film to form a first opening;

filling said first opening with a fourth insulating film;

removing said third insulating film to form a second opening;

forming a fifth insulating film in said second opening and on said fourth insulating film; and

etching back said fifth insulating film to form said mask insulating films.

6 . The method according to claim 5 , wherein said patterning further comprises:

removing a part of said polysilicon film between a first adjacent two of said mask insulating films;

forming a source diffusion layer in said substrate between the first adjacent two of said mask insulating films;

forming side wall insulating films on side walls of said polysilicon film; and

forming a source line connected with said source diffusion layer between the first adjacent two of said mask insulating films.

7 . The method according to claim 6 , wherein said patterning further comprises:

removing said fourth insulating film to form a third opening; and

etching said polysilicon film by using a second adjacent two of said mask insulating films as a mask to form said floating gates.

8 . The method according to claim 4 , wherein said forming said control gate comprises:

exposing a surface of said semiconductor substrate in said third opening;

forming said second insulating film to cover the exposed surface of said semiconductor substrate, said floating gates and said mask insulating films; and

forming said control gate on said second insulating film to oppose to said floating gate.

9 . The method according to claim 5 , wherein said removing a part of said third insulating film comprises:

forming said first opening to expose a surface of said polysilicon film.

10 . The method according to claim 9 , wherein said forming said first opening comprises:

forming said first opening such that said first opening have a dull angle at a corner between a side wall of said third insulating film and the surface of said polysilicon film.

11 . The method according to claim 9 , wherein said forming said first opening comprises:

etching the polysilicon film in said first opening.

12 . The method according to claim 8 , wherein said exposing a surface of said semiconductor substrate in said third opening comprises:

removing said first insulating film between said first adjacent two of said mask insulating films.

13 . A split gate type non-volatile semiconductor memory device, comprising:

a floating gate provided on a semiconductor substrate through a first insulating film; and

a control gate provided to cover a portion of said floating gate through a second insulating film,

wherein said control gate has a side surface on a side of said floating gate, and

said side surface of said control gate is inclined in a direction of said floating gate.

14 . The split gate type non-volatile semiconductor memory device according to claim 13 , further comprising:

a spacer insulating film formed on said floating gate to oppose to said side surface through said second insulating film.