Programmable sample rate analog to digital converter and method for use therewith
View Patent ↗A programmable sample rate ADC includes a delta sigma modulator for producing a digital signal, and a programmable decimation filter, that includes X stages of integration, a down-sampling stage for down-sampling by a factor of N, and Y stages of differentiation. The programmable sample rate ADC produces a digital output signal at a substantially constant frequency.
1. A radio receiver front end for receiving a received radio signal having a plurality of channel signals, each of the plurality of channel signals being modulated at one of a corresponding plurality of carrier frequencies, and for converting a selected one of the plurality of channel signals into a digital baseband signal, the radio receiver front end comprising:
a channel selector, for producing a control signal that corresponds to a selected one of the plurality of channels;
a local oscillator, operatively coupled to a reference oscillation, for producing a local oscillation signal at a local oscillation frequency, the local oscillation frequency based on the control signal;
an analog to digital converter module, operatively coupled to a modulated signal, the modulated signal operably coupled to the received radio signal, and a variable frequency clock signal that varies as a function of the local oscillation frequency, the analog to digital converter module for producing a digital signal; and
a programmable decimation filter, operatively coupled to the digital signal and the control signal for producing the digital baseband signal at a substantially constant frequency.
2. The radio receiver front end of claim 1 wherein the programmable decimation filter includes a down-sampling stage for down-sampling by a factor of N that is controlled, based on the control signal.
3. The radio receiver front end of claim 1 wherein the programmable decimation filter includes X stages of integration and wherein X is at least one.
4. The radio receiver front end of claim 1 wherein the programmable decimation filter includes Y stages of differentiation and wherein Y is at least one.
5. The radio receiver front end of claim 4 wherein X=Y.
6. The radio receiver front end of claim 1 wherein the analog to digital converter module includes a delta sigma modulator.
7. A method for use in a radio receiver front end for receiving a received radio signal having a plurality of channel signals, each of the plurality of channel signals being modulated at one of a corresponding plurality of carrier frequencies, and for converting a selected one of the plurality of channel signals into a digital baseband signal, the radio receiver front end comprising:
generating a local oscillation signal at a local oscillation frequency, the local oscillation frequency based on a selected one of the plurality of channels;
analog to digital converting an intermediate frequency signal to a digital signal based on a variable frequency clock signal that varies as a function of the local oscillation frequency;
integrating the digital signal to produce an integrated signal; and
downsampling the integrated signal by a variable factor N, to produce a down-sampled signal having a substantially constant frequency.
8. The method of claim 7 further comprising:
differentiating the down-sampled signal to produce the digital output signal.
9. The method of claim 7 wherein, the factor N is selected based on a control signal so as to provide the substantially constant output sampling frequency.