Nonvolatile semiconductor memory device and method of rewriting data thereof

1. A nonvolatile semiconductor memory device, comprising:

a memory cell array having a plurality of memory cells; and

a writing controller for writing data to said memory cell array, wherein

said memory cell array stores data in a nonvolatile state with respect to each memory cell pair composed of two memory cells, the data storing being executed based on a difference in memory information between said two memory cells,

said writing controller is capable of individually setting said memory information for each of said memory cells of said memory cell array, and

said nonvolatile semiconductor memory device further comprises an amplification circuit for amplifying the difference in information stored in two memory cells, wherein

said writing controller executes writing data of the same value to plural pairs of said memory cell pairs, and

said nonvolatile semiconductor memory device further comprises a decision element, wherein

said decision element obtains a majority logic based on outputs from said amplification circuit provided to said plural pairs of said memory cell pairs, thereby to decide the data written to said plural pairs of said memory cell pairs for outputting.

2. A nonvolatile semiconductor memory device, comprising:

a memory cell array having a plurality of memory cells; and

a writing controller for writing data to said memory cell array, wherein

said memory cell array stores data in a nonvolatile state with respect to each memory cell pair composed of two memory cells, the data storing being executed based on a difference in memory information between said two memory cells, and

said writing controller is capable of individually setting said memory information for each of said memory cells of said memory cell array,

the nonvolatile semiconductor memory device further comprising:

an amplification circuit for amplifying the difference in information stored in two memory cells;

a reading controller for reading data from said memory cell array; and

a detector for detecting levels of a first voltage and a second voltage in comparison with a reference voltage set for respective first and second voltages, wherein

said first voltage is a voltage supplied to said amplification circuit as a supply voltage,

said second voltage is a voltage obtained by boosting said first voltage and is a preceding voltage of a gate voltage supplied to said control gate upon reading data from said memory cell array,

said detector detects whether both said first voltage and second voltage increase above said respective reference voltages, and further detects whether at least one of said first voltage and second voltage drops below said respective reference voltages, and

said reading controller newly executes data reading from said memory cell array when said detector detects that at least one of said first voltage and second voltage drops below said respective reference voltages while data is read from said memory cell array, and detects at a later time that both said first voltage and second voltage increase above said respective reference voltages.

3. The nonvolatile semiconductor memory device according to claim 2 , wherein

said detector comprises a voltage detector for detecting whether said first voltage level increases above said reference voltage and further detecting whether said first voltage level drops below said reference voltage, and

said voltage detector is supplied with said second voltage as a supply voltage.