IP Library Granted Patent US 7,480,246
Granted Patent B2
US 7,480,246 · App. 11/738,561 · Granted Jan 20, 2009

Characterizing transmission of data segments within a switch fabric using multiple counters for each destination node

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Quick Facts
Patent No.
US 7,480,246
App. No.
11/738,561
Granted
Jan 20, 2009
Kind
B2
Abstract

In one embodiment, data segments routed through a switch fabric are identified as being either a first or a second type. First and second counters are maintained for a destination node to characterize the transmission of data segments of the corresponding type within the switch fabric. For each first-type time period, all transmitted data segments are identified as being the first type. For each second-type time period, all transmitted data segments are identified as being the second type. The first- and second-type time periods are interleaved. The first counter is reset after termination of each first-type time period and the second counter is reset after termination of each second-type time period to correct for a possible error in characterizing the transmission of the data segments within the switch fabric during the corresponding time period.

Claims (78)

1. A method for routing data segments through a switch fabric from one or more source nodes of the switch fabric to a destination node of the switch fabric, the method comprising:

(a) identifying each data segment as being one of at least two different segment types;

(b) transmitting each identified data segment within the switch fabric from one of the one or more source nodes to the destination node; and

(c) maintaining at least two counters for the destination node, one counter for each different segment type, wherein each counter characterizes the transmission of identified data segments of the corresponding segment type within the switch fabric, wherein:

for each of a plurality of first-type time periods, all data segments transmitted within the switch fabric are identified as being of a first type, and a corresponding first-type counter characterizes the transmission of the first-type data segments within the switch fabric;

for each of a plurality of second-type time periods, all data segments transmitted within the switch fabric are identified as being of a second type, and a corresponding second-type counter characterizes the transmission of the second-type data segments within the switch fabric;

the first-type time periods are interleaved with the second-type time periods;

the first-type counter is reset after termination of each first-type time period to correct for a possible error in characterizing the transmission of the first-type data segments within the switch fabric during the first-type time period; and

the second-type counter is reset after termination of each second-type time period to correct for a possible error in characterizing the transmission of the second-type data segments within the switch fabric during the second-type time period.

2. The invention of claim 1 , wherein a characterization error results from loss of one or more data segments during transmission within the switch fabric.

3. The invention of claim 1 , wherein:

the first-type counter is reset prior to the beginning of each first-type time period; and

the second-type counter is reset prior to the beginning of each second-type time period.

4. The invention of claim 1 , wherein each data segment is identified as being one of the at least two different segment types by setting one or more bits in the data segment to a value corresponding to the segment type, wherein each different segment type has a different value.

5. The invention of claim 1 , wherein:

each data segment is identified as being either a first type of data segment or a second type of data segment;

the first-type counter is reset during each second-type time period; and

the second-type counter is reset during each first-type time period.

6. The invention of claim 1 , wherein the data segments are identified using a round-robin sequence of three or more different types of data segments.

7. The invention of claim 1 , further comprising:

(d) summing outputs from the at least two counters to characterize overall transmission status of data segments within the switch fabric from the one or more source nodes to the destination node; and

(e) controlling the transmission of data segments from the one or more source nodes to the destination node based on the characterized overall transmission status.

8. The invention of claim 7 , wherein controlling the transmission of data segments comprises:

(e1) comparing the characterized overall transmission status to a specified transmission-suspension threshold level;

(e2) suspending the transmission of data segments within the switch fabric from the one or more source nodes to the destination node based on the comparison;

(e3) updating the characterized overall transmission status during the suspension of the transmission;

(e4) comparing the updated characterized overall transmission status to a specified transmission-resumption threshold level; and

(e5) resuming the transmission of data segments within the switch fabric from the one or more source nodes to the destination node based on the comparison of step (e4).

9. The invention of claim 1 , wherein:

the switch fabric comprises (i) an ingress stage, (ii) an intermediate stage connected to the ingress stage, and (iii) an egress stage connected to the intermediate stage;

the one or more source nodes are in the ingress stage;

the destination node is in the egress stage;

the at least two counters are maintained in the intermediate stage;

the egress stage transmits information to the intermediate stage characterizing transmission of data segments from the destination node outside of the switch fabric; and

the intermediate stage updates the at least two counters based on the information received from the egress stage and information characterizing transmission of data segments within the switch fabric from the intermediate stage to the destination node in the egress stage.

10. The invention of claim 9 , wherein a characterization error results from loss of at least some of the information transmitted from the egress stage to the intermediate stage.

11. The invention of claim 9 , wherein:

the intermediate stage comprises (i) one or more input modules connected to the ingress stage, (ii) one or more intermediate modules connected to the one or more input modules, and (iii) one or more output modules connected between the one or more intermediate modules and the egress stage; and

the at least two counters are maintained in one of the one or more output modules.

12. A switch fabric for routing data segments from one or more source nodes of the switch fabric to a destination node of the switch fabric, the switch fabric comprising:

(a) a circuit for identifying each data segment as being one of at least two different segment types;

(b) a circuit for transmitting each identified data segment within the switch fabric from one of the one or more source nodes to the destination node; and

(c) a circuit for maintaining at least two counters for the destination node, one counter for each different segment type, wherein each counter characterizes the transmission of identified data segments of the corresponding segment type within the switch fabric, wherein:

for each of a plurality of first-type time periods, the switch fabric identifies all data segments transmitted within the switch fabric as being of a first type, and a corresponding first-type counter characterizes the transmission of the first-type data segments within the switch fabric;

for each of a plurality of second-type time periods, the switch fabric identifies all data segments transmitted within the switch fabric as being of a second type, and a corresponding second-type counter characterizes the transmission of the second-type data segments within the switch fabric;

the switch fabric interleaves the first-type time periods with the second-type time periods;

the switch fabric resets the first-type counter after termination of each first-type time period to correct for a possible error in characterizing the transmission of the first-type data segments within the switch fabric during the first-type time period; and

the switch fabric resets the second-type counter after termination of each second-type time period to correct for a possible error in characterizing the transmission of the second-type data segments within the switch fabric during the second-type time period.

13. The invention of claim 12 , wherein a characterization error results from loss of one or more data segments during transmission within the switch fabric.

14. The invention of claim 12 , wherein:

the switch fabric resets the first-type counter prior to the beginning of each first-type time period; and

the switch fabric resets the second-type counter prior to the beginning of each second-type time period.

15. The invention of claim 12 , wherein the switch fabric identifies each data segment as being one of the at least two different segment types by setting one or more bits in the data segment to a value corresponding to the segment type, wherein each different segment type has a different value.

16. The invention of claim 12 , wherein:

the switch fabric identifies each data segment as being either a first type of data segment or a second type of data segment;

the switch fabric resets the first-type counter during each second-type time period; and

the switch fabric resets the second-type counter during each first-type time period.

17. The invention of claim 12 , wherein the switch fabric identifies the data segments using a round-robin sequence of three or more different types of data segments.

18. The invention of claim 12 , wherein the switch fabric is further configured:

(d) sum outputs from the at least two counters to characterize overall transmission status of data segments within the switch fabric from the one or more source nodes to the destination node; and

(e) control the transmission of data segments from the one or more source nodes to the destination node based on the characterized overall transmission status.

19. The invention of claim 18 , wherein the switch fabric controls the transmission of data segments by:

(e1) comparing the characterized overall transmission status to a specified transmission-suspension threshold level;

(e2) suspending the transmission of data segments within the switch fabric from the one or more source nodes to the destination node based on the comparison;

(e3) updating the characterized overall transmission status during the suspension of the transmission;

(e4) comparing the updated characterized overall transmission status to a specified transmission-resumption threshold level; and

(e5) resuming the transmission of data segments within the switch fabric from the one or more source nodes to the destination node based on the comparison of step (e4).

20. The invention of claim 12 , wherein:

the switch fabric comprises (i) an ingress stage, (ii) an intermediate stage connected to the ingress stage, and (iii) an egress stage connected to the intermediate stage;

the one or more source nodes are in the ingress stage;

the destination node is in the egress stage;

the intermediate stage maintains the at least two counters;

the egress stage transmits information to the intermediate stage characterizing transmission of data segments from the destination node outside of the switch fabric; and

the intermediate stage updates the at least two counters based on the information received from the egress stage and information characterizing transmission of data segments within the switch fabric from the intermediate stage to the destination node in the egress stage.

21. The invention of claim 20 , wherein a characterization error results from loss of at least some of the information transmitted from the egress stage to the intermediate stage.

22. The invention of claim 20 , wherein:

the intermediate stage comprises (i) one or more input modules connected to the ingress stage, (ii) one or more intermediate modules connected to the one or more input modules, and (iii) one or more output modules connected between the one or more intermediate modules and the egress stage; and

one of the one or more output modules maintains the at least two counters.

Assignments (8)
TERMINATION AND RELEASE OF SECURITY INTEREST IN PATENT RIGHTS (RELEASES RF 032856-0031) Recorded Feb 2, 2016
From: DEUTSCHE BANK AG NEW YORK BRANCH, AS COLLATERAL AGENT
To: LSI CORPORATION; AGERE SYSTEMS LLC
Reel/Frame 037684/0039 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Feb 24, 2015
From: LSI CORPORATION
To: INTEL CORPORATION
Reel/Frame 035090/0477 →
TERMINATION AND RELEASE OF SECURITY INTEREST IN PATENTS AT REEL/FRAME NO. 32856/0031 Recorded Nov 18, 2014
From: DEUTSCHE BANK AG NEW YORK BRANCH
To: LSI CORPORATION; AGERE SYSTEMS LLC
Reel/Frame 034286/0872 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Nov 14, 2014
From: AGERE SYSTEMS LLC
To: LSI CORPORATION
Reel/Frame 034245/0655 →
CERTIFICATE OF CONVERSION Recorded Oct 19, 2014
From: AGERE SYSTEMS INC.
To: AGERE SYSTEMS LLC
Reel/Frame 034014/0846 →
PATENT SECURITY AGREEMENT Recorded May 8, 2014
From: LSI CORPORATION; AGERE SYSTEMS LLC
To: DEUTSCHE BANK AG NEW YORK BRANCH, AS COLLATERAL AGENT
Reel/Frame 032856/0031 →
MERGER Recorded Apr 30, 2007
From: TERABLAZE, INC.
To: AGERE SYSTEMS INC.
Reel/Frame 019226/0358 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Apr 30, 2007
From: AGARWAL, GAURAV; MUSACCHIO, JOHN T.; MO, JEONGHOON; WALRAND, JEAN
To: TERABLAZE, INC.
Reel/Frame 019226/0298 →