IP Library Granted Patent US 7,429,992
Granted Patent B2
US 7,429,992 · App. 11/740,692 · Granted Sep 30, 2008

Method and system for providing accelerated video processing in a communication device

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Quick Facts
Patent No.
US 7,429,992
App. No.
11/740,692
Granted
Sep 30, 2008
Kind
B2
Abstract

Providing accelerated video processing in a communication device may comprise receiving video data from a video source on a chip, determining a first format for at least a portion of the received video data, and determining a second format of at least a remaining portion of the received video data. At least a portion of the received video data having the first format may be routed to a first device for processing and at least a remaining portion of the received video data having the second format may be routed to a second device for processing. The portion of the received video data with the first format may comprise RGB format, while the remaining portion of the received video data with the second format comprises YUV format. The received video data comprises images with alternating video formats, which are accordingly routed to the first or second device for processing.

Claims (33)

1. A method for processing video data, the method comprising:

receiving on a chip, input video data comprising a plurality of formats;

separating, within said chip, said input video data to generate a first portion of output video data corresponding to one of said plurality of formats for rendering on a first display device, and at least another portion of output video data corresponding to at least another of said plurality of formats; and

outputting from said chip, said at least another portion of output video data corresponding to said at least another of said plurality of formats for processing by a second device.

2. The method according to claim 1 , comprising routing said first portion of said output video data corresponding to said one of said plurality of formats to said first display device.

3. The method according to claim 1 , comprising routing said at least another portion of said output video data corresponding to said at least another of said plurality of formats to a compression/decompression (CODEC) device.

4. The method according to claim 3 , comprising direct memory access (DMA) transferring said at least another portion of said output video data corresponding to said at least another of said plurality of formats to said compression/decompression (CODEC) device.

5. The method according to claim 1 , wherein said first portion of said output video data corresponding to said one of said plurality of formats comprises RGB format.

6. The method according to claim 1 , wherein said at least another portion of said output video data corresponding to said at least another of said plurality of formats comprises YUV format.

7. The method according to claim 1 , wherein said input video data comprises images with alternating video formats.

8. The method according to claim 1 , wherein said input video data is transmitted from at least one video source that generates successive images having at least two alternating video formats.

9. A machine-readable storage having stored thereon, a computer program having at least one code section for processing video data, the at least one code section being executable by a machine for causing the machine to perform steps comprising:

receiving on a chip, input video data comprising a plurality of formats;

separating, within said chip, said input video data to generate a first portion of output video data corresponding to one of said plurality of formats for rendering on a first display device, and at least another portion of output video data corresponding to at least another of said plurality of formats; and

outputting from said chip, said at least another portion of output video data corresponding to said at least another of said plurality of formats for processing by a second device.

10. The machine-readable storage according to claim 9 , comprising code for routing said first portion of said output video data corresponding to said one of said plurality of formats to said first display device.

11. The machine-readable storage according to claim 9 , comprising code for routing said at least another portion of said output video data corresponding to said at least another of said plurality of formats to a compression/decompression (CODEC) device.

12. The machine-readable storage according to claim 11 comprising code for direct memory access (DMA) transferring said at least another portion of said output video data corresponding to said at least another of said plurality of formats to said compression/decompression (CODEC) device.

13. The machine-readable storage according to claim 9 , wherein said first portion of said output video data corresponding to said one of said plurality of formats comprises RGB format.

14. The machine-readable storage according to claim 9 , wherein said at least another portion of said output video data corresponding to said at least another of said plurality of formats comprises YUV format.

15. The machine-readable storage according to claim 9 , wherein said input video data comprises images with alternating video formats.

16. The machine-readable storage according to claim 9 , wherein said input video data is transmitted from at least one video source that generates successive images having at least two alternating video formats.

17. A system for processing video data, the system comprising:

at least one processor that receives on a chip, input video data comprising a plurality of formats;

said at least one processor separates, within said chip, said input video, to generate a first portion of output video data corresponding to one of said plurality of formats for rendering on a first display device, and at least another portion of output video data corresponding to at least another of said plurality of formats; and

said at least one processor outputs from said chip, said at least another portion of output video data corresponding to said at least another of said plurality of formats for processing by a second device.

18. The system according to claim 17 , wherein said at least one processor routes said first portion of said output video data corresponding to said one of said plurality of formats to said first display device.

19. The system according to claim 17 , wherein said at least one processor routes said at least another portion of said output video data corresponding to said at least another of said plurality of formats to a compression/decompression (CODEC) device.

20. The system according to claim 19 , wherein said at least one processor direct memory access (DMA) transfers said at least another portion of said output video data corresponding to said at least another of said plurality of formats to said compression/decompression (CODEC) device.

21. The system according to claim 17 , wherein said first portion of said output video data corresponding to said one of said plurality of formats comprises RGB format.

22. The system according to claim 17 , wherein said at least another portion of said output video data corresponding to said at least another of said plurality of formats comprises YUV format.

23. The system according to claim 17 , wherein said input video data comprises images with alternating video formats.

24. The system according to claim 17 , wherein said input video data is transmitted from at least one video source that generates successive images having at least two alternating video formats.

Assignments (6)
CORRECTIVE ASSIGNMENT TO CORRECT THE ERROR IN RECORDING THE MERGER PREVIOUSLY RECORDED AT REEL: 047357 FRAME: 0302. ASSIGNOR(S) HEREBY CONFIRMS THE ASSIGNMENT. Recorded Mar 22, 2019
From: AVAGO TECHNOLOGIES GENERAL IP (SINGAPORE) PTE. LTD.
To: AVAGO TECHNOLOGIES INTERNATIONAL SALES PTE. LIMITED
Reel/Frame 048674/0834 →
CORRECTIVE ASSIGNMENT TO CORRECT THE EFFECTIVE DATE OF MERGER PREVIOUSLY RECORDED ON REEL 047195 FRAME 0658. ASSIGNOR(S) HEREBY CONFIRMS THE THE EFFECTIVE DATE IS 09/05/2018. Recorded Oct 29, 2018
From: AVAGO TECHNOLOGIES GENERAL IP (SINGAPORE) PTE. LTD.
To: AVAGO TECHNOLOGIES INTERNATIONAL SALES PTE. LIMITED
Reel/Frame 047357/0302 →
MERGER Recorded Oct 4, 2018
From: AVAGO TECHNOLOGIES GENERAL IP (SINGAPORE) PTE. LTD.
To: AVAGO TECHNOLOGIES INTERNATIONAL SALES PTE. LIMITED
Reel/Frame 047195/0658 →
TERMINATION AND RELEASE OF SECURITY INTEREST IN PATENTS Recorded Feb 3, 2017
From: BANK OF AMERICA, N.A., AS COLLATERAL AGENT
To: BROADCOM CORPORATION
Reel/Frame 041712/0001 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Feb 1, 2017
From: BROADCOM CORPORATION
To: AVAGO TECHNOLOGIES GENERAL IP (SINGAPORE) PTE. LTD.
Reel/Frame 041706/0001 →
PATENT SECURITY AGREEMENT Recorded Feb 11, 2016
From: BROADCOM CORPORATION
To: BANK OF AMERICA, N.A., AS COLLATERAL AGENT
Reel/Frame 037806/0001 →