IP Library Granted Patent US 7,518,919
Granted Patent B2
US 7,518,919 · App. 11/748,077 · Granted Apr 14, 2009

Flash memory data correction and scrub techniques

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Quick Facts
Patent No.
US 7,518,919
App. No.
11/748,077
Granted
Apr 14, 2009
Kind
B2
Abstract

In order to maintain the integrity of data stored in a flash memory that are susceptible to being disturbed by operations in adjacent regions of the memory, disturb events cause the data to be read, corrected and re-written before becoming so corrupted that valid data cannot be recovered. The sometimes conflicting needs to maintain data integrity and system performance are balanced by deferring execution of some of the corrective action when the memory system has other high priority operations to perform. In a memory system utilizing very large units of erase, the corrective process is executed in a manner that is consistent with efficiently rewriting an amount of data much less than the capacity of a unit of erase.

Claims (51)

1. A non-volatile memory system, comprising:

an arrangement of flash memory cells organized into blocks of a minimum number of memory cells that are erasable together, the blocks individually storing a plurality of units of data and error correction codes calculated from the units of data, and

a controller coupled with the memory cell array and that operates to:

identify when a scrub trigger event has occurred for individual units of data stored in the blocks of memory cells,

read the data stored in the identified units,

correct errors in the read data of the identified units by use of their associated error correction codes,

write the corrected first block data into a designated block of memory cells regardless of the blocks from which the data of the identified units were read, and

thereafter consolidating data of the blocks in which scrub trigger events have been identified by:

read the individual corrected units of data from the designated block,

thereafter write the individual read units of data into destination blocks other than those from which the data of the identified units were read and other than the designated block,

copy into the destination blocks uncorrected data units of the blocks from which the data of the identified units were read, thereby to consolidate corrected and uncorrected units of data into other blocks.

2. The memory system claim 1 , wherein the controller additionally operates to initiate consolidating data in response to the designated block becoming full of data.

3. The memory system claim 1 , wherein the controller additionally operates to recognize the scrub trigger event to include an event disturbing at least one of the data units stored in the blocks.

4. The memory system claim 1 , wherein the controller additionally operates to pause the operation after reading the data but before correcting any errors thereof, until other higher priority operations are performed.

5. The memory system claim 1 , wherein the controller additionally operates to pause the operation after correcting any errors thereof but before writing the corrected data, until other higher priority operations are performed.

6. A method of operating a flash memory cell array that is organized into blocks of a minimum number of memory cells that are erasable together, wherein the blocks store a number of units of data and error correction codes calculated from the units of data, comprising:

identifying when a scrub trigger event has occurred for data stored in at least one of the units of data in a first one of the blocks,

reading the identified at least one unit of data from the first block,

correcting any errors in the data read from the first block by use of its associated error correction code to provide corrected first block data,

temporarily storing the corrected first block data in a second one of the blocks,

identifying when a disturbing event has occurred for at least one of the units of data stored in a third one of the blocks,

reading the identified at least one unit of data from the third block,

correcting any errors in the data read from the third block by use of its associated error correction code to provide corrected third block data,

temporarily storing the corrected third block data in the second block,

consolidating data of the first block into a fourth one of the blocks by

reading the corrected first block data from the second block,

thereafter writing the read corrected first block data as at least one unit of data to the fourth block, and

thereafter copying uncorrected data units of the first block into the fourth block, and

consolidating data of the third block into a fifth one of the blocks by

reading the corrected third block data from the second block,

thereafter writing the corrected third block data as at least one unit of data to the fifth block, and

thereafter copying uncorrected data units of the third block into the fifth block.

7. The method of claim 6 , wherein the scrub trigger event for the first block includes an event disturbing said at least one of the data units stored in the first block, and the scrub trigger event for the third block includes an event disturbing said at least one of the data units stored in the third block.

8. The method of claim 6 , additionally comprising pausing the operation after reading data of the first or third block but before correcting any errors thereof, until other higher priority operations are performed.

9. The method of claim 6 , additionally comprising pausing the operation after correcting any errors of the read data from the first or third block but before writing the corrected first or third block data into the second block, until other higher priority operations are performed.

10. The method of claim 6 , wherein consolidating data of the first block into the fourth block and consolidating data of the third block into the fifth block are individually initiated during operation of the memory cell array by another factor not associated with the operation described in claim 1 .

11. The method of claim 6 , wherein consolidating data of the first block into the fourth block and consolidating data of the third block into the fifth block are initiated during operation of the memory cell array in response to the second block becoming full of corrected data.

12. A method of operating a flash memory cell array that is organized into blocks of a minimum number of memory cells that are erasable together, wherein the blocks store a number of units of data and error correction codes calculated from the units of data, comprising the steps of:

identifying when scrub trigger events have occurred for individual units data stored in the blocks of memory cells,

reading the data of the identified units,

correcting errors in the read data of the identified units by use of their associated error correction codes,

storing the corrected units of data in a designated block of memory cells regardless of the blocks from which the data of the identified units were read, and

consolidating data of the blocks in which scrub trigger events have been identified by the steps of:

individually reading the corrected units of data from the designated block,

thereafter writing the individual read units of data into destination blocks other than those from which the data of the identified units were read or the designated block, and

copying into the destination blocks uncorrected data units of the blocks from which the data of the identified units were read, thereby to consolidate corrected and uncorrected data of blocks into other blocks.

13. The method of claim 12 , wherein the data consolidation is initiated during operation of the memory by another factor not associated with the operation described in claim 12 .

14. The method of claim 12 , wherein the data consolidation is initiated in response to the designated block becoming full of data.

15. The method of claim 12 , additionally comprising the step of reading the units of data stored in the designated block in response to a command to read data from the blocks in which scrub trigger events have been identified.

16. The method of claim 12 , additionally comprising the step of pausing the operation after reading a particular unit of data but before correcting any errors thereof, until other higher priority operations are performed.

17. The method of claim 12 , additionally comprising the step of pausing the operation after correcting any errors of a particular unit of data but before writing the corrected data to the designated block, until other higher priority operations are performed.

Assignments (10)
TERMINATION AND RELEASE OF SECURITY INTEREST IN PATENTS Recorded May 27, 2016
From: SANDISK CORPORATION; SANDISK TECHNOLOGIES, INC.
To: SANDISK CORPORATION
Reel/Frame 038825/0137 →
CHANGE OF NAME Recorded May 25, 2016
From: SANDISK TECHNOLOGIES INC
To: SANDISK TECHNOLOGIES LLC
Reel/Frame 038809/0600 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Mar 31, 2016
From: LONGITUDE FLASH MEMORY SYSTEMS SARL
To: SANDISK TECHNOLOGIES, INC.
Reel/Frame 038166/0445 →
CHANGE OF NAME Recorded Dec 12, 2013
From: PS2 LUXCO S.A.R.L.
To: LONGITUDE FLASH MEMORY SYSTEMS S.A.R.L.
Reel/Frame 031814/0068 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Dec 6, 2013
From: PS3 LUXCO SARL
To: PS2 LUXCO SARL
Reel/Frame 031734/0555 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Dec 5, 2013
From: INTELLIGENT INTELLECTUAL PROPERTY HOLDINGS LLC
To: PS3 LUXCO SARL
Reel/Frame 031723/0836 →
SECURITY AGREEMENT Recorded Aug 21, 2013
From: INTELLIGENT INTELLECTUAL PROPERTY HOLDINGS LLC
To: SANDISK CORPORATION
Reel/Frame 031074/0651 →
CORRECTIVE ASSIGNMENT TO CORRECT THE ADDRESS OF THE ASSIGNOR IN THE ASSIGNMENT DOCUMENT PREVIOUSLY RECORDED ON REEL 030953 FRAME 0416. ASSIGNOR(S) HEREBY CONFIRMS THE ASSIGNMENT. Recorded Aug 8, 2013
From: SANDISK TECHNOLOGIES, INC.
To: INTELLIGENT INTELLECTUAL PROPERTY HOLDINGS LLC.
Reel/Frame 030994/0046 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Aug 6, 2013
From: SANDISK TECHNOLOGIES, INC.
To: INTELLIGENT INTELLECTUAL PROPERTY HOLDINGS LLC.
Reel/Frame 030953/0416 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded May 23, 2011
From: SANDISK CORPORATION
To: SANDISK TECHNOLOGIES INC.
Reel/Frame 026326/0358 →