Patent Assignment
Reel/Frame 038809/0600
CHANGE OF NAME
Recorded: 2016-05-25
Received: 2016-05-25
Pages: 17
Assignor
SANDISK TECHNOLOGIES INC
Executed: 2016-05-16
Assignee
SANDISK TECHNOLOGIES LLC
6900 DALLAS PARKWAY, SUITE 325, PLANO, TX, 75024, UNITED STATES
Covered Applications
(100)
REDUCED COMPLEXITY ARRAY LINE DRIVERS FOR 3D MATRIX ARRAYS
App. No. 12/385,964
→
MEMORY CELL THAT INCLUDES A CARBON-BASED MEMORY ELEMENT AND METHODS OF FORMING THE SAME
App. No. 12/418,855
→
APPARATUS, SYSTEM, AND METHOD FOR BAD BLOCK REMAPPING
App. No. 12/419,223
→
CROSS POINT NON-VOLATILE MEMORY CELL
App. No. 12/418,191
→
MULTI-BIT RESISTANCE-SWITCHING MEMORY CELL
App. No. 12/418,212
→
PROGRAMMING NON-VOLATILE STORAGE ELEMENT USING CURRENT FROM OTHER ELEMENT
App. No. 12/418,233
→
OPTICAL NETWORK FOR CLUSTER COMPUTING
App. No. 12/416,890
→
HOT SWAPPABLE COMPUTER CARD CARRIER
App. No. 12/416,895
→
OPTICAL NETWORK FOR CLUSTER COMPUTING
App. No. 12/416,893
→
HOT SWAPPABLE COMPUTER CARD CARRIER
App. No. 12/416,898
→
ELECTRONIC DEVICES INCLUDING CARBON-BASED FILMS HAVING SIDEWALL LINERS, AND METHODS OF FORMING SUCH DEVICES
App. No. 12/415,964
→
DELIBERATE DESTRUCTION OF INTEGRATED CIRCUITS
App. No. 12/415,549
→
FLASH MEMORY DATA CORRECTION AND SCRUB TECHNIQUES
App. No. 12/415,158
→
CARBON-BASED FILMS, AND METHODS OF FORMING THE SAME, HAVING DIELECTRIC FILLER MATERIAL AND EXHIBITING REDUCED THERMAL RESISTANCE
App. No. 12/415,011
→
PAGE BUFFER PROGRAM COMMAND AND METHODS TO REPROGRAM PAGES WITHOUT RE-INPUTTING DATA TO A MEMORY DEVICE
App. No. 12/414,925
→
METHOD FOR SELECTIVELY RETRIEVING COLUMN REDUNDANCY DATA IN MEMORY DEVICE
App. No. 12/414,935
→
FABRICATING AND OPERATING A MEMORY ARRAY HAVING A MULTI-LEVEL CELL REGION AND A SINGLE-LEVEL CELL REGION
App. No. 12/414,567
→
MEMORY CELL THAT EMPLOYS A SELECTIVELY FABRICATED CARBON NANO-TUBE REVERSIBLE RESISTANCE-SWITCHING ELEMENT, AND METHODS OF FORMING THE SAME
App. No. 12/410,771
→
MEMORY SYSTEM WITH SECTIONAL DATA LINES
App. No. 12/410,648
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MEMORY CELL THAT EMPLOYS A SELECTIVELY FABRICATED CARBON NANO-TUBE REVERSIBLE RESISTANCE-SWITCHING ELEMENT FORMED OVER A BOTTOM CONDUCTOR AND METHODS OF FORMING THE SAME
App. No. 12/410,789
→
NON-VOLATILE MEMORY WITH REDUCED LEAKAGE CURRENT FOR UNSELECTED BLOCKS AND METHOD FOR OPERATING SAME
App. No. 12/409,020
→
NONVOLATILE MEMORY AND METHOD WITH REDUCED PROGRAM VERIFY BY IGNORING FASTEST AND/OR SLOWEST PROGRAMMING BITS
App. No. 12/407,665
→
CONTROLLING SELECT GATE VOLTAGE DURING ERASE TO IMPROVE ENDURANCE IN NON-VOLATILE MEMORY
App. No. 12/406,014
→
CURRENT SENSING METHOD AND APPARATUS FOR A MEMORY ARRAY
App. No. 12/405,160
→
FLASH EEPROM SYSTEM WITH SIMULTANEOUS MULTIPLE DATA SECTOR PROGRAMMING AND STORAGE OF PHYSICAL BLOCK CHARACTERISTICS IN OTHER DESIGNATED BLOCKS
App. No. 12/403,014
→
FLASH EEPROM SYSTEM WITH SIMULTANEOUS MULTIPLE DATA SECTOR PROGRAMMING AND STORAGE OF PHYSICAL BLOCK CHARACTERISTICS IN OTHER DESIGNATED BLOCKS
App. No. 12/402,955
→
BAD PAGE MARKING STRATEGY FOR FAST READOUT IN MEMORY
App. No. 12/400,091
→
PAIR BIT LINE PROGRAMMING TO IMPROVE BOOST VOLTAGE CLAMPING
App. No. 12/398,368
→
REVERSIBLE-POLARITY DECODER CIRCUIT AND METHOD
App. No. 12/396,461
→
SET AND RESET DETECTION CIRCUITS FOR REVERSIBLE RESISTANCE SWITCHING MEMORY MATERIAL
App. No. 12/395,859
→
METHODS AND APPARATUS FOR GENERATING VOLTAGE REFERENCES USING TRANSISTOR THRESHOLD DIFFERENCES
App. No. 12/395,198
→
ELECTRON BLOCKING LAYERS FOR ELECTRONIC DEVICES
App. No. 12/390,275
→
SELF-BOOSTING SYSTEM WITH SUPPRESSION OF HIGH LATERAL ELECTRIC FIELDS
App. No. 12/372,636
→
RETRACTABLE CARD ADAPTER
App. No. 12/371,859
→
PARTIAL BLOCK DATA PROGRAMMING AND READING OPERATIONS IN A NON-VOLATILE MEMORY
App. No. 12/371,460
→
NON-VOLATILE MEMORY AND METHOD WITH IMPROVED SENSING HAVING BIT-LINE LOCKOUT CONTROL
App. No. 12/371,479
→
METHODS INVOLVING MEMORY WITH HIGH DIELECTRIC CONSTANT ANTIFUSES ADAPTED FOR USE AT LOW VOLTAGE
App. No. 12/367,258
→
MEMORY WITH HIGH DIELECTRIC CONSTANT ANTIFUSES ADAPTED FOR USE AT LOW VOLTAGE
App. No. 12/367,214
→
APPARATUS FOR REDUCING THE IMPACT OF PROGRAM DISTURB
App. No. 12/365,648
→
METAL OXIDE MATERIALS AND ELECTRODES FOR RE-RAM
App. No. 12/364,707
→
OPTIMIZED ELECTRODES FOR RE-RAM
App. No. 12/364,732
→
SITUATION SENSITIVE MEMORY PERFORMANCE
App. No. 12/364,334
→
SYSTEM AND METHOD TO READ DATA SUBJECT TO A DISTURB CONDITION
App. No. 12/363,554
→
LEADFRAME BASED FLASH MEMORY CARDS
App. No. 12/363,311
→
METHOD FOR REDUCING DIELECTRIC OVERETCH WHEN MAKING CONTACT TO CONDUCTIVE FEATURES
App. No. 12/363,588
→
DEEP WORDLINE TRENCH TO SHIELD CROSS COUPLING BETWEEN ADJACENT CELLS FOR SCALED NAND
App. No. 12/363,165
→
MEMORY CARD WITH TWO STANDARD SETS OF CONTACTS AND A HINGED CONTACT COVERING MECHANISM
App. No. 12/361,165
→
THREE TERMINAL NONVOLATILE MEMORY DEVICE WITH VERTICAL GATED DIODE
App. No. 12/320,351
→
METHODS FOR PARTITIONED ERASE AND ERASE VERIFICATION IN NON-VOLATILE MEMORY TO COMPENSATE FOR CAPACITIVE COUPLING EFFECTS
App. No. 12/358,633
→
READ OPERATION FOR NON-VOLATILE STORAGE WITH COMPENSATION FOR COUPLING
App. No. 12/357,364
→
READ OPERATION FOR NON-VOLATILE STORAGE WITH COMPENSATION FOR COUPLING
App. No. 12/357,368
→
NONVOLATILE MEMORY CELL INCLUDING CARBON STORAGE ELEMENT FORMED ON A SILICIDE LAYER
App. No. 12/320,008
→
PIPELINED DATA RELOCATION AND IMPROVED CHIP ARCHITECTURES
App. No. 12/353,185
→
COOPERATIVE CHARGE PUMP CIRCUIT AND METHOD
App. No. 12/352,489
→
ROBUST SENSING CIRCUIT AND METHOD
App. No. 12/349,417
→
NON-VOLATILE MEMORY AND METHOD WITH WRITE CACHE PARTITION MANAGEMENT METHODS
App. No. 12/348,899
→
MAPPING ADDRESS TABLE MAINTENANCE IN A MEMORY DEVICE
App. No. 12/348,782
→
SPARE BLOCK MANAGEMENT OF NON-VOLATILE MEMORIES
App. No. 12/348,825
→
NON-VOLATILE MEMORY AND METHOD WITH WRITE CACHE PARTITIONING
App. No. 12/348,891
→
NONVOLATILE MEMORY WITH WRITE CACHE HAVING FLUSH/EVICTION METHODS
App. No. 12/348,895
→
RESIST FEATURE AND REMOVABLE SPACER PITCH DOUBLING PATTERNING METHOD FOR PILLAR STRUCTURES
App. No. 12/318,609
→
NANOIMPRINT ENHANCED RESIST SPACER PATTERNING METHOD
App. No. 12/318,590
→
NON-VOLATILE MEMORY AND METHOD FOR SENSING WITH PIPELINED CORRECTIONS FOR NEIGHBORING PERTURBATIONS
App. No. 12/347,864
→
NON-VOLATILE MEMORY AND METHOD WITH CONTINUOUS SCANNING TIME-DOMAIN SENSING
App. No. 12/347,876
→
SYSTEM, METHOD AND MEMORY DEVICE PROVIDING DATA SCRAMBLING COMPATIBLE WITH ON-CHIP COPY OPERATION
App. No. 12/345,921
→
DYNAMIC MAPPING OF LOGICAL RANGES TO WRITE BLOCKS
App. No. 12/346,433
→
OPTIMIZED MEMORY MANAGEMENT FOR RANDOM AND SEQUENTIAL DATA WRITING
App. No. 12/346,451
→
NON-REAL TIME REPROGRAMMING OF NON-VOLATILE MEMORY TO ACHIEVE TIGHTER DISTRIBUTION OF THRESHOLD VOLTAGES
App. No. 12/344,779
→
MULTI-PASS PROGRAMMING FOR MEMORY WITH REDUCED DATA STORAGE REQUIREMENT
App. No. 12/344,763
→
THREE-DIMENSIONAL MEMORY STRUCTURES HAVING SHARED PILLAR MEMORY CELLS
App. No. 12/344,022
→
NON-VOLATILE MEMORY AND METHOD WITH SHARED PROCESSING FOR AN AGGREGATE OF READ/WRITE CIRCUITS
App. No. 12/342,679
→
MANAGING HOST APPLICATION PRIVILEGES
App. No. 12/342,965
→
SMART DETECTION CIRCUIT FOR WRITING TO NON-VOLATILE STORAGE
App. No. 12/339,327
→
QUAD MEMORY CELL AND METHOD OF MAKING SAME
App. No. 12/318,022
→
PROGRAMMING A MEMORY CELL WITH A DIODE IN SERIES BY APPLYING REVERSE BIAS
App. No. 12/318,021
→
PULSE RESET FOR NON-VOLATILE STORAGE
App. No. 12/339,363
→
REVERSE SET WITH CURRENT LIMIT FOR NON-VOLATILE STORAGE
App. No. 12/339,313
→
QUAD MEMORY CELL AND METHOD OF MAKING SAME
App. No. 12/318,001
→
CAPACITIVE DISCHARGE METHOD FOR WRITING TO NON-VOLATILE MEMORY
App. No. 12/339,338
→
DYNAMIC AND ADAPTIVE OPTIMIZATION OF READ COMPARE LEVELS BASED ON MEMORY CELL THRESHOLD VOLTAGE DISTRIBUTION
App. No. 12/338,850
→
ELECTROSTATIC DISCHARGE PROTECTIVE CIRCUIT HAVING RISE TIME DETECTOR AND DISCHARGE SUSTAINING CIRCUITRY
App. No. 12/338,056
→
MANAGING ACCESS TO AN ADDRESS RANGE IN A STORAGE DEVICE
App. No. 12/338,738
→
METHOD FOR USING A CAPTCHA CHALLENGE TO PROTECT A REMOVABLE MOBILE FLASH MEMORY STORAGE DEVICE
App. No. 12/338,696
→
METHOD OF PROGRAMMING A NONVOLATILE MEMORY DEVICE CONTAINING A CARBON STORAGE MATERIAL
App. No. 12/314,903
→
DATA REFRESH FOR NON-VOLATILE STORAGE
App. No. 12/338,879
→
PROGRAMMING NON-VOLATILE STORAGE USING BINARY AND MULTI-STATE PROGRAMMING PROCESSES
App. No. 12/339,005
→
REGULATION OF RECOVERY RATES IN CHARGE PUMPS
App. No. 12/337,050
→
APPLYING ADAPTIVE BODY BIAS TO NON-VOLATILE STORAGE BASED ON NUMBER OF PROGRAMMING CYCLES
App. No. 12/335,803
→
CONTROLLED DATA ACCESS TO NON-VOLATILE MEMORY
App. No. 12/336,445
→
DUAL INSULATING LAYER DIODE WITH ASYMMETRIC INTERFACE STATE AND METHOD OF FABRICATION
App. No. 12/336,410
→
ADAPTIVE ERASE AND SOFT PROGRAMMING FOR MEMORY
App. No. 12/332,646
→
PROGRAM CONTROL OF A NON-VOLATILE MEMORY
App. No. 12/316,159
→
ALL-BIT-LINE ERASE VERIFY AND SOFT PROGRAM VERIFY
App. No. 12/323,413
→
SCALABLE DATABASE MANAGEMENT SOFTWARE ON A CLUSTER OF NODES USING A SHARED-DISTRIBUTED FLASH MEMORY
App. No. 12/276,540
→
METHODS FOR TAG-GROUPING OF BLOCKS IN STORAGE DEVICES
App. No. 12/276,344
→
SELF-BOOSTING SYSTEM FOR FLASH MEMORY CELLS
App. No. 12/276,186
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INTEGRATION OF DAMASCENE TYPE DIODES AND CONDUCTIVE WIRES FOR MEMORY DEVICE
App. No. 12/292,620
→
USB MEMORY CARD READER HAVING MEMORY CARD IDENTIFICATION
App. No. 12/273,463
→
MEDIA CARD COMMAND PASS THROUGH METHODS
App. No. 12/267,100
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PCI EXPRESS LOAD SHARING NETWORK INTERFACE CONTROLLER CLUSTER
App. No. 12/265,698
→