IP Library Granted Patent US 8,139,391
Granted Patent B2
US 8,139,391 · App. 12/418,212 · Granted Mar 20, 2012

Multi-bit resistance-switching memory cell

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Quick Facts
Patent No.
US 8,139,391
App. No.
12/418,212
Granted
Mar 20, 2012
Kind
B2
Abstract

A non-volatile storage apparatus comprises a set of Y lines, a set of X lines and a plurality of memory cells in communication with the set of X lines and the set of Y lines. Each memory cell of the plurality of memory cells includes a resistance element in a static resistance condition and two or more reversible resistance-switching elements. The resistance element in the static resistance condition and the two or more reversible resistance-switching elements are connected to different Y lines of the set of Y lines. The resistance element in the low resistance state and the two or more reversible resistance-switching elements are connected to a common X line of the set of X lines. One or multiple bits of data are programmed into a particular memory cell of the plurality of memory cells by causing current flow between Y lines connected to the particular memory cell.

Claims (75)

1. A non-volatile storage apparatus, comprising:

a set of Y lines;

a set of X lines; and

a plurality of memory cells in communication with the set of X lines and the set of Y lines, each memory cell of the plurality of memory cells includes:

a resistance element that is statically in a conductive state for the remaining operational life of the non-volatile storage apparatus, and

two or more reversible resistance-switching elements, the resistance element that is statically in the conductive state for the remaining operational life of the non-volatile storage apparatus and the two or more reversible resistance-switching elements are connected to different Y lines of the set of Y lines, the resistance element that is statically in the conductive state for the remaining operational life of the non-volatile storage apparatus and the two or more reversible resistance-switching elements are connected to a common X line of the set of X lines.

2. A non-volatile storage apparatus according to claim 1 , wherein:

multiple bits of data are programmed into a particular memory cell of the plurality of memory cells by causing current flow between Y lines connected to the particular memory cell.

3. A non-volatile storage apparatus according to claim 1 , wherein:

one or more of the reversible resistance-switching elements for a particular memory cell of the plurality of memory cells are set to a low resistance state by a current flow between Y lines for the particular memory cell.

4. A non-volatile storage apparatus according to claim 3 , wherein:

a particular one of the reversible resistance-switching elements for the particular memory cell is set to a high resistance state by a current flow between a Y line connected to the particular one of the reversible resistance-switching elements and the common X line.

5. A non-volatile storage apparatus according to claim 3 , further comprising:

a semiconductor region of a first type running along the common X line; and

semiconductor regions of a second type adjacent the semiconductor region of the first type, each of the semiconductor regions of the second type are each adjacent one of the reversible resistance-switching elements or the resistance element that is statically in the conductive state for the remaining operational life of the non-volatile storage apparatus, the current flow between Y lines for the particular memory cell includes the semiconductor region of the first type and the semiconductor regions of the second type operating like a transistor.

6. A non-volatile storage apparatus according to claim 3 , further comprising:

a rail-shaped semiconductor region of a first type running along the common X line;

pillar shaped semiconductor regions of a second type adjacent the semiconductor region of the first type, each of the semiconductor regions of the second type are adjacent one of the reversible resistance-switching elements, the reversible resistance-switching elements are pillar shaped; and

additional pillar shaped semiconductor regions of the second type each of which are adjacent one of the reversible resistance-switching elements or the resistance element that is statically in the conductive state for the remaining operational life of the non-volatile storage apparatus, the reversible resistance-switching elements can switch between the low resistance state and the high resistance state.

7. A non-volatile storage apparatus, comprising:

a set of Y lines;

a set of X lines; and

a plurality of memory cells in communication with the set of X lines and the set of Y lines, each memory cell of the plurality of memory cells includes:

a resistance element in a static resistance condition, and

two or more reversible resistance-switching elements, the resistance element in the static resistance condition and the two or more reversible resistance-switching elements are connected to different Y lines of the set of Y lines, the resistance element in the static resistance condition and the two or more reversible resistance-switching elements are connected to a common X line of the set of X lines;

the resistance element in the static resistance condition for a particular memory cell of the plurality of memory cells is connected to a first Y line;

a first reversible resistance-switching element for the particular memory cell is connected to a second Y line;

a second reversible resistance-switching element for the particular memory cell is connected to a third Y line;

the first reversible resistance-switching element is changed to a first state by passing a current from the first Y line to the second Y line via the resistance element in the static resistance condition;

the second reversible resistance-switching element is changed to the first state by passing a current from the second Y line to the third Y line via the first reversible resistance-switching element;

the first reversible resistance-switching element is changed to a second state from the first state by passing a current from the second Y line to the common X line;

the second reversible resistance-switching element is changed to the second state from the first state by passing a current from the third Y line to the common X line;

the static resistance condition is a conductive state.

8. A non-volatile storage apparatus according to claim 7 , wherein:

the resistance element in the static resistance condition is permanently in a conductive state.

9. A non-volatile storage apparatus according to claim 7 , wherein:

the plurality of memory cells comprise a three-dimensional monolithic memory array.

10. A non-volatile storage apparatus according to claim 7 , wherein:

the resistance element in the static resistance condition is permanently in a conductive state.

11. A non-volatile storage apparatus according to claim 7 , wherein:

the plurality of memory cells comprise a three-dimensional monolithic memory array.

12. A non-volatile storage apparatus, comprising:

a set of Y lines;

a set of X lines;

a plurality of memory cells in communication with the set of X lines and the set of Y lines, each memory cell of the plurality of memory cells includes:

a resistance element in a static resistance condition,

two or more reversible resistance-switching elements, the resistance element in the static resistance condition and the two or more reversible resistance-switching elements are connected to different Y lines of the set of Y lines, the resistance element in the static resistance condition and the two or more reversible resistance-switching elements are connected to a common X line of the set of X lines,

a semiconductor region of a first type running along the common X line, and

semiconductor regions of a second type adjacent the semiconductor region of the first type, each of the semiconductor regions of the second type are each adjacent one of the reversible resistance-switching elements or the resistance element in the static resistance condition, current flow between Y lines for the particular memory cell includes the semiconductor region of the first type and the semiconductor regions of the second type operating like a transistor.

13. A non-volatile storage apparatus according to claim 12 , wherein:

multiple bits of data are programmed into the particular memory cell of the plurality of memory cells by causing current flow between Y lines connected to the particular memory cell.

14. A non-volatile storage apparatus according to claim 12 , wherein:

the resistance element in the static resistance condition is permanently in a conductive state.

15. A non-volatile storage apparatus according to claim 12 , wherein:

the plurality of memory cells comprise a three-dimensional monolithic memory array.

16. A non-volatile storage apparatus according to claim 12 , wherein:

the semiconductor region of the first type is a n-type; and

the semiconductor regions of the second type are a p-type.

17. A non-volatile storage apparatus according to claim 12 , wherein:

data is programmed into the particular memory cell of the plurality of memory cells by causing current flow between Y lines connected to the particular memory cell.

18. A non-volatile storage apparatus, comprising:

a set of Y lines;

a set of X lines;

a plurality of memory cells in communication with the set of X lines and the set of Y lines, each memory cell of the plurality of memory cells includes:

a resistance element in a static resistance condition, and

two or more reversible resistance-switching elements, the resistance element in the static resistance condition and the two or more reversible resistance-switching elements are connected to different Y lines of the set of Y lines, the resistance element in the static resistance condition and the two or more reversible resistance-switching elements are connected to a common X line of the set of X lines,

portions of the two or more reversible resistance-switching elements, the resistance element in the static resistance condition and the common X line operate like transistors during current flow between Y lines for a particular memory cell.

19. A non-volatile storage apparatus according to claim 18 , wherein:

data is programmed into the particular memory cell of the plurality of memory cells by causing current flow between Y lines connected to the particular memory cell.

20. A non-volatile storage apparatus according to claim 18 , wherein:

the resistance element in the static resistance condition is permanently in a conductive state.

21. A non-volatile storage apparatus according to claim 18 , wherein:

the plurality of memory cells comprise a three-dimensional monolithic memory array.

22. A non-volatile storage apparatus according to claim 18 , wherein:

multiple bits of data are programmed into the particular memory cell of the plurality of memory cells by causing current flow between Y lines connected to the particular memory cell.

Assignments (7)
PARTIAL RELEASE OF SECURITY INTERESTS Recorded Apr 25, 2025
From: JPMORGAN CHASE BANK, N.A., AS AGENT
To: SANDISK TECHNOLOGIES, INC.
Reel/Frame 071382/0001 →
SECURITY AGREEMENT Recorded Apr 25, 2025
From: SANDISK TECHNOLOGIES, INC.
To: JPMORGAN CHASE BANK, N.A., AS COLLATERAL AGENT
Reel/Frame 071050/0001 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Dec 31, 2024
From: SANDISK TECHNOLOGIES LLC
To: SANDISK TECHNOLOGIES, INC.
Reel/Frame 069796/0423 →
CHANGE OF NAME Recorded May 25, 2016
From: SANDISK TECHNOLOGIES INC
To: SANDISK TECHNOLOGIES LLC
Reel/Frame 038809/0600 →
CORRECTIVE ASSIGNMENT TO CORRECT THE INCORRECT LISTED PATENT NUMBER 8853569 TO THE CORRECT PATENT NUMBER 8883569 PREVIOUSLY RECORDED ON REEL 038300 FRAME 0665. ASSIGNOR(S) HEREBY CONFIRMS THE ASSIGNMENT. Recorded Apr 25, 2016
From: SANDISK 3D LLC
To: SANDISK TECHNOLOGIES INC.
Reel/Frame 038520/0552 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Mar 30, 2016
From: SANDISK 3D LLC.
To: SANDISK TECHNOLOGIES INC.
Reel/Frame 038300/0665 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Apr 3, 2009
From: SCHEUERLEIN, ROY E
To: SANDISK 3D LLC
Reel/Frame 022504/0583 →