IP Library Granted Patent US 7,799,692
Granted Patent B2
US 7,799,692 · App. 11/749,938 · Granted Sep 21, 2010

Method and apparatus for the treatment of a semiconductor wafer

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Quick Facts
Patent No.
US 7,799,692
App. No.
11/749,938
Granted
Sep 21, 2010
Kind
B2
Abstract

Treatment of a semiconductor wafer employs: a) position-dependent measuring of a parameter characterizing the semiconductor wafer to determine a position-dependent value of the parameter over an entire surface of the semiconductor wafer, b) oxidizing the entire surface of the semiconductor wafer under the action of an oxidizing agent with simultaneous exposure of the entire surface, the oxidation rate and thus the thickness of the resulting oxide layer dependent on the light intensity at the surface of the semiconductor wafer, and c) removing of the oxide layer, the light intensity in step b) predefined in a position-dependent manner such that differences in the position-dependent values of the parameter measured are reduced by the position-dependent oxidation rate resulting in step b) and subsequent removal of the oxide layer in step c).

Claims (17)

1. A method for the treatment of a semiconductor wafer, comprising the following steps:

a) position-dependent measuring of a parameter which characterizes the semiconductor wafer in order to determine the position-dependent value of the parameter over an entire surface of the semiconductor wafer,

b) oxidizing the surface of the semiconductor wafer with an oxidizing agent which contacts the surface of the wafer, while simultaneously exposing the entire surface by light of a variable light intensity, the oxidation rate and the thickness of the resulting oxide layer thus being varied by the light intensity at the surface of the semiconductor wafer, and

c) removing the oxide layer,

the light intensity in step b) being predefined in a position-dependent manner such that over the wafer surface, the differences of the position-dependent values of the parameter measured in step a) are reduced by the position-dependent oxidation rate resulting from the position-dependent light intensity in step b) and the subsequent removal of the oxide layer in step c).

2. The method of claim 1 , wherein the semiconductor wafer comprises silicon-germanium or silicon carbide.

3. The method of claim 1 , wherein the exposure of the semiconductor wafer is effected by a light source and a filter fitted between the light source and the semiconductor wafer, the filter having a position-dependent light transmissivity which is in a defined relationship with the position-dependent value of the parameter.

4. The method of claim 1 , wherein a grayscale map is calculated with the aid of a computer from the position-dependent value of the parameter measured in step a), and the exposure of the semiconductor wafer in step b) is effected by a projection apparatus which projects an image of said grayscale map onto the surface of the semiconductor wafer.

5. The method of claim 1 , wherein the exposure of the semiconductor wafer is effected by a multiplicity of light sources which are arranged alongside one another in a plane lying parallel to the plane of the semiconductor wafer, the light sources being controlled individually or in groups in such a way that the light intensity acting on the surface of the semiconductor wafer at each position is in a defined relationship with the position-dependent value of the parameter.

6. The method of claim 1 , wherein the oxidizing agent is gaseous.

7. The method of claim 6 , wherein the oxidizing agent is oxygen, ozone, a nitrogen oxide, or combination thereof.

8. The method of claim 7 , wherein the semiconductor wafer comprises silicon.

9. The of claim 1 , wherein a parameter measured is the height deviation from a defined ideal plane.

10. The method of claim 1 , wherein the semiconductor wafer is an SOI wafer which comprises a semiconductor layer on an electrically insulating carrier.

11. The method of claim 10 , wherein the semiconductor layer comprises silicon-germanium or silicon carbide.

12. The method of claim 10 , wherein the semiconductor layer comprises silicon.

13. The method of claim 10 , wherein the parameter measured is the thickness of the semiconductor layer.

Assignments (3)
CORRECTIVE ASSIGNMENT TO CORRECT THE DATE OF THE CHANGE OF ADDRESS FROM 03/12/2020 TO 12/03/2020 PREVIOUSLY RECORDED AT REEL: 056719 FRAME: 0881. ASSIGNOR(S) HEREBY CONFIRMS THE ASSIGNMENT. Recorded Jul 1, 2021
From: SILTRONIC AG
To: SILTRONIC AG
Reel/Frame 057561/0451 →
CHANGE OF ADDRESS Recorded Jun 30, 2021
From: SILTRONIC AG
To: SILTRONIC AG
Reel/Frame 056719/0881 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Jun 7, 2007
From: MURPHY, BRIAN; FEIJOO, DIEGO; WAHLICH, REINHOLD
To: SILTRONIC AG
Reel/Frame 019393/0928 →