IP Library Granted Patent US 7,572,653
Granted Patent B2
US 7,572,653 · App. 11/750,955 · Granted Aug 11, 2009

Method of fabricating light emitting diode

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Quick Facts
Patent No.
US 7,572,653
App. No.
11/750,955
Granted
Aug 11, 2009
Kind
B2
Abstract

Disclosed herein is a method of fabricating a light emitting diode. The method comprises preparing a substrate, forming a lower semiconductor layer, an active layer and an upper semiconductor layer on the substrate, forming a photoresist pattern over the upper semiconductor layer such that a sidewall of the photoresist pattern is inclined to an upper surface of the substrate, and sequentially etching the upper semiconductor layer, active layer and lower semiconductor layer using the photoresist pattern as an etching mask. With this structure, since the light emitting diode permits light generated in the active layer to be easily emitted to an outside through the sidewalls of the semiconductor layers, it has improved light emitting efficiency.

Claims (40)

1. A method of fabricating a light emitting diode, comprising:

preparing a substrate;

forming a lower semiconductor layer, an active layer, and an upper semiconductor layer on the substrate;

forming an etching stop pattern on a portion of the semiconductor layer;

forming a photoresist pattern over the upper semiconductor layer and the etching stop pattern such that a sidewall of the photoresist pattern is inclined to an upper surface of the substrate; and

sequentially etching the upper semiconductor layer, active layer and lower semiconductor layer using the photoresist pattern as an etching mask; and

removing the photoresist pattern and the etching stop pattern.

2. The method according to claim 1 , wherein the step of forming the photoresist pattern comprises forming the photoresist pattern for defining a light emitting region and performing a reflow process to the photoresist pattern such that the sidewall of the photoresist pattern is inclined to the upper surface of the substrate.

3. The method according to claim 2 , wherein the reflow process of the photoresist pattern is performed such that the sidewall of the photoresist pattern has an inclined angle in the range of 10˜80 degrees with respect to the upper surface of the substrate.

4. The method according to claim 1 , wherein the etching stop pattern is formed of metal.

5. The method according to claim 1 , further comprising:

forming a first electrode pad on the lower semiconductor layer; and

forming a second electrode pad on the upper semiconductor layer,

wherein the first electrode pad and the second electrode pad are disposed on the substrate.

6. The method according to claim 1 , further comprising after removing the photoresist pattern and the etching stop pattern, etching the upper semiconductor layer and the active layer to expose a portion of the lower semiconductor layer.

7. The method according to claim 6 , wherein both sidewalls of the lower semiconductor layer are inclined to the upper surface of the substrate, and only sidewall of the active layer and only one sidewall of the upper semiconductor layer are inclined to the upper surface of the substrate.

8. The method according to claim 6 , wherein both sidewalls of the lower semiconductor layer, the active layer, and the upper semiconductor layer are inclined to the upper surface of the substrate.

9. The method according to claim 1 , wherein the width of the lower semiconductor layer, the active layer, and the upper semiconductor layer decrease in a first direction, and light is emitted from the light emitting device in the first direction.

10. The method according to claim 1 , further comprising forming a buffer layer on substrate, wherein the lower semiconductor layer, the active layer, and the upper semiconductor layer are formed on the buffer layer.

11. A method of fabricating a light emitting diode, comprising:

preparing a substrate;

forming a lower semiconductor layer, an active layer, and an upper semiconductor layer on the substrate;

forming a photoresist pattern over the upper semiconductor layer such that a sidewall of the photoresist pattern is inclined to an upper surface of the substrate;

first etching the upper semiconductor layer, active layer and lower semiconductor layer using the photoresist pattern as an etching mask;

removing the photoresist pattern; and

second etching the upper semiconductor layer and the active layer to expose a portion of the lower semiconductor layer after removing the photoresist pattern.

12. The method according to claim 11 , wherein the step of forming the photoresist pattern comprises forming the photoresist pattern for defining a light emitting region and performing a reflow process to the photoresist pattern such that the sidewall of the photoresist pattern is inclined to the upper surface of the substrate.

13. The method according to claim 12 , wherein the reflow process of the photoresist pattern is performed such that the sidewall of the photoresist pattern has an inclined angle in the range of 10˜80 degrees with respect to the upper surface of the substrate.

14. The method according to claim 11 , further comprising:

forming an etching stop pattern on a portion of the upper semiconductor layer, the photoresist pattern being formed over the upper semiconductor layer and the etching stop pattern; and

removing the etching stop pattern after the first etching but before the second etching.

15. The method according to claim 14 , wherein the etching stop pattern is formed of metal.

16. The method according to claim 11 , further comprising:

forming a first electrode pad on the upper semiconductor layer; and

forming a second electrode pad on the exposed portion of the lower semiconductor layer,

wherein the first electrode pad and the second electrode pad are disposed on the substrate.

17. The method according to claim 11 , wherein both sidewalls of the lower semiconductor layer are inclined to the upper surface of the substrate, and only sidewall of the active layer and only one sidewall of the upper semiconductor layer are inclined to the upper surface of the substrate.

18. The method according to claim 11 , wherein both sidewalls of the lower semiconductor layer, the active layer, and the upper semiconductor layer are inclined to the upper surface of the substrate.

19. The method according to claim 11 , wherein the width of the lower semiconductor layer, the active layer, and the upper semiconductor layer decrease in a first direction, and light is emitted from the light emitting device in the first direction.

20. The method according to claim 11 , further comprising forming a buffer layer on substrate, wherein the lower semiconductor layer, the active layer, and the upper semiconductor layer are formed on the buffer layer.

Assignments (3)
CHANGE OF NAME Recorded Apr 21, 2014
From: SEOUL OPTO DEVICE CO., LTD
To: SEOUL VIOSYS CO., LTD
Reel/Frame 032723/0126 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Jun 10, 2011
From: SEOUL OPTO DEVICE CO., LTD.
To: SEOUL SEMICONDUCTOR COMPANY, LTD.
Reel/Frame 026465/0364 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Aug 3, 2007
From: KIM, JONG HWAN; YOON, YEO JIN; LEE, JAE HO
To: SEOUL OPTO DEVICE CO., LTD.
Reel/Frame 019644/0621 →