IP Library Granted Patent US 7,685,704
Granted Patent B2
US 7,685,704 · App. 11/760,004 · Granted Mar 30, 2010

Method for manufacturing bump of probe card

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Quick Facts
Patent No.
US 7,685,704
App. No.
11/760,004
Granted
Mar 30, 2010
Kind
B2
Abstract

A method for manufacturing a bump of a probe card is disclosed. In accordance with the present invention, the bump has a high aspect ratio, a high elasticity, a high durability suitable for testing a high speed device. The bump is formed using a sacrificial substrate as a mold to have a shape of Π or II for elasticity and durability.

Claims (15)

1. A method for manufacturing a bump of a probe card, the method comprising steps of:

(a) forming first and second mask layer patterns on a first and second surfaces of a sacrificial substrate respectively, the first and second mask layer patterns exposing at least a portion of a first bump region where a first bump is to be formed and at least a portion of a second bump region where a second bump is to be formed corresponding to the first bump region, respectively;

(b) removing the sacrificial substrate exposed by the first and second mask layer patterns to form the first bump region and the second bump region mutually connected, respectively;

(c) removing the first and second mask layer patterns;

(d) bonding an insulating substrate to one of the first and second surfaces of the sacrificial substrate;

(e) forming first and second bumps filling the first and second bump regions, respectively; and

(f) removing the sacrificial substrate.

2. The method in accordance with claim 1 , wherein the first mask layer pattern comprises a first mask portion extending from a first side to a second side of the first bump region so as to expose a portion of the first bump region, and the second mask layer pattern comprises a second mask portion extending from a first side to a second side of the second bump region so as to expose a portion of the second bump region.

3. The method in accordance with claim 1 , wherein the first mask layer pattern comprises a first mask portion extending from a first side to a second side of the first bump region so as to expose a portion of the first bump region, and the second mask layer pattern exposes an entirety of the second bump region, and wherein the insulating substrate is bonded to the second surface of the sacrificial substrate.

4. The method in accordance with claim 1 , wherein the first mask layer pattern exposes an entirety of the first bump region, the second mask layer pattern comprises a second mask portion extending from a first side to a second side of the second bump region so as to expose a portion of the second bump region, and wherein the insulating substrate is bonded to the second surface of the sacrificial substrate.

5. The method in accordance with claim 1 , further comprising forming an insulating film on the surfaces of the sacrificial substrate.

6. The method in accordance with claim 1 , further comprising forming a bonding layer at an interface of the sacrificial layer and the insulating substrate.

7. The method in accordance with claim 1 , wherein the insulating substrate comprises one of a ceramic substrate, a glass substrate and an insulating silicon substrate.

8. The method in accordance with claim 1 , wherein each of the first and second mask layer patterns comprises one of a photoresist film and a TEOS film.

9. The method in accordance with claim 1 , wherein the sacrificial substrate comprises one of a silicon substrate and a glass substrate.

Assignments (3)
CORRECTIVE ASSIGNMENT TO CORRECT THE ASSIGNEE'S ADDRESS PREVIOUSLY RECORDED ON REEL 022678 FRAME 0466. ASSIGNOR(S) HEREBY CONFIRMS THE ASSIGNMENT. Recorded May 15, 2009
From: UNITEST INC.
To: WILL TECHNOLOGY CO., LTD.
Reel/Frame 022689/0001 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded May 14, 2009
From: UNITEST INC.
To: WILL TECHNOLOGY CO., LTD.
Reel/Frame 022678/0466 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Jun 8, 2007
From: KIM, BONG HWAN; KIM, JONG BOK
To: UNITEST INC.
Reel/Frame 019400/0452 →