Semiconductor device and method of manufacturing the same
View Patent ↗When microfabrication is done, a reliable semiconductor device is offered. A semiconductor device has a semiconductor substrate which has a main front surface, a plurality of convex patterns formed on the main front surface of a semiconductor substrate so that each might have a floating gate and a control gate, a first insulating film formed so that the upper surface and the side surface of each of a plurality of convex patterns might be covered, and so that width might become large rather than the portion which covers the lower part side surface of a convex pattern in the portion which covers an upper part side surface, and a second insulating film that covers the upper surface and the side surface of the first insulating film so that the cavity between the adjacent convex patterns may be occluded. The position occluded by the second insulating film of a cavity is a position higher than the upper surface of a floating gate, and is a position lower than the upper surface of a control gate.
1. A semiconductor device, comprising:
a semiconductor substrate which has a main front surface;
a plurality of convex patterns formed over a main front surface of the semiconductor substrate each including a floating gate and a control gate;
a first insulating film formed so that an upper surface and a side surface of each of the convex patterns is covered, and a width of a portion of the first insulating film which covers a lower part side surface of the convex pattern is smaller than a width of a portion of the first insulating film which covers an upper part side surface; and
a second insulating film that covers an upper surface and a side surface of the first insulating film so that a cavity between adjacent convex patterns is occluded,
wherein
a position of the cavity occluded by the second insulating film is higher than an upper surface of the floating gate and lower than an upper surface of the control gate.
2. A semiconductor device according to claim 1 , wherein
a gap between the adjacent convex pattern is 200 nm or less.
3. A semiconductor device according to claim 1 , wherein
an aspect ratio of a trench formed between the adjacent convex patterns is five or more.
4. A method of manufacturing a semiconductor device, comprising the steps of:
forming a plurality of convex patterns over a main front surface of a semiconductor substrate;
forming a first insulating film that includes a silicon oxide film on first film formation conditions so that a width of a portion of the first insulating film which covers a lower part side surface of the convex pattern is smaller than a width of a portion of the first insulating film which covers an upper part side surface, and a side surface of each of the convex patterns is covered; and
forming a second insulating film over an upper surface and a side surface of the first insulating film on second film formation conditions that allow horizontal direction growth greater than the first film formation conditions so that a cavity between the adjacent convex patterns is occluded.
5. A method of manufacturing a semiconductor device according to claim 4 , wherein
the first film formation conditions are conditions using a High-Density-Plasma Chemical Vapor Deposition Method performed without applying a bias voltage of RF to a substrate stage for laying the semiconductor substrate; and
the second film formation conditions are conditions using a Plasma Chemical Vapor Deposition Method.
6. A method of manufacturing a semiconductor device according to claim 4 , wherein
the first film formation conditions are conditions using a High-Density-Plasma Chemical Vapor Deposition Method performed without applying a bias voltage of RF to a substrate stage for laying the semiconductor substrate; and
the second film formation conditions are conditions using a Sub Atmospheric Chemical Vapor Deposition Method.
7. A method of manufacturing a semiconductor device according to claim 4 , wherein
the first film formation conditions are conditions using a Plasma Chemical Vapor Deposition Method; and
the second film formation conditions are conditions using a High-Density-Plasma Chemical Vapor Deposition Method performed by applying a bias voltage of RF to a substrate stage for laying the semiconductor substrate.
8. A method of manufacturing a semiconductor device according to claim 4 , wherein
the first and the second film formation conditions are conditions using a Plasma Chemical Vapor Deposition Method.
9. A method of manufacturing a semiconductor device according to claim 4 , wherein
the first film formation conditions are conditions using a Plasma Chemical Vapor Deposition Method; and
the second film formation conditions are conditions using a Sub Atmospheric Chemical Vapor Deposition Method.
10. A method of manufacturing a semiconductor device, comprising the steps of:
forming a plurality of convex patterns over a main front surface of a semiconductor substrate so that an aspect ratio of a trench formed between the adjacent convex patterns is five or more;
forming a first insulating film on first film formation conditions so that a width of a portion of the first insulating film which covers a lower part side surface of the convex pattern is smaller than a width of a portion of the first insulating film which covers an upper part side surface, and a side surface of each of the convex patterns is covered; and
forming a second insulating film over an upper surface and a side surface of the first insulating film on second film formation conditions that allow horizontal direction growth greater than the first film formation conditions so that a cavity between the adjacent convex patterns is occluded.
11. A method of manufacturing a semiconductor device, comprising the steps of:
forming a plurality of convex patterns over a main front surface of a semiconductor substrate so that the each convex pattern includes a floating gate and a control gate;
forming a first insulating film on first film formation conditions so that a width of a portion of the first insulating film which covers a lower part side surface of the convex pattern is smaller than a width of a portion of the first insulating film which covers an upper part side surface, and a side surface of each of the convex patterns is covered; and
forming a second insulating film over an upper surface and a side surface of the first insulating film on second film formation conditions that allow horizontal direction growth greater than the first film formation conditions so that a cavity between the adjacent convex patterns is occluded.
12. A method of manufacturing a semiconductor device, comprising the steps of:
forming a plurality of convex patterns over a main front surface of a semiconductor substrate;
forming a first insulating film on first film formation conditions so that a width of a portion of the first insulating film which covers a lower part side surface of the convex pattern is smaller than a width of a portion of the first insulating film which covers an upper part side surface, and a side surface of each of the convex patterns is covered;
doing redeposition to a side wall lower part of the first insulating film while doing sputtering of a side wall upper part of the first insulating film; and
forming a second insulating film over an upper surface and a side surface of the first insulating film on second film formation conditions so that a cavity between the adjacent convex patterns is occluded.
13. A method of manufacturing a semiconductor device according to claim 12 , wherein
the first film formation conditions are conditions using a Plasma Chemical Vapor Deposition Method; and
the second film formation conditions are conditions using a High-Density-Plasma Chemical Vapor Deposition Method performed by applying a bias voltage of RF to a substrate stage for laying the semiconductor substrate.
14. A method of manufacturing a semiconductor device according to claim 12 , wherein
the first film formation conditions are conditions using a Plasma Chemical Vapor Deposition Method; and
the second film formation conditions are conditions using a High-Density-Plasma Chemical Vapor Deposition Method performed without applying a bias voltage of RF to a substrate stage for laying the semiconductor substrate.
15. A method of manufacturing a semiconductor device according to claim 12 , wherein
the first and the second film formation conditions are conditions using a Plasma Chemical Vapor Deposition Method.
16. A method of manufacturing a semiconductor device according to claim 12 , wherein
the first film formation conditions are conditions using a Plasma Chemical Vapor Deposition Method; and
the second film formation conditions are conditions using a Sub Atmospheric Chemical Vapor Deposition Method.
17. A method of manufacturing a semiconductor device according to claim 12 , wherein
the sputtering is performed using a high-density-plasma chemical vapor deposition apparatus.