IP Library › Granted Patent US 7,548,464
Granted Patent B2
US 7,548,464 · App. 11/771,465 · Granted Jun 16, 2009

Method for setting programming start bias for flash memory device and programming method using the same

Assignee: Hynix Semiconductor Inc.
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Quick Facts
Patent No.
US 7,548,464
App. No.
11/771,465
Granted
Jun 16, 2009
Kind
B2
Abstract

A method for setting a programming start bias for a flash memory device to perform a programming operation is provided. First, the method performs pre-programming to change a threshold voltage distribution of a selected transistor using a first programming voltage and detects the maximum threshold voltage level of the changed threshold voltage distribution. The method then calculates the difference between the detected maximum threshold voltage level and a target maximum threshold voltage level and sets a start bias to a voltage obtained by adding the calculated difference to the first programming voltage.

Claims (41)

1. A method for setting a programming start bias for a flash memory device, the method comprising:

performing pre-programming a selected memory cell using a first programming voltage;

measuring a highest threshold voltage of the selected memory cell after the pre-programming;

calculating a difference between the highest threshold voltage and a target highest threshold voltage of a target threshold voltage distribution; and

setting a start bias by adding the difference to the first programming voltage for the programming operation.

2. The method according to claim 1 , further comprising;

implementing the programming operation using an Incremental Step Pulse Programming (ISPP) method after setting the start bias.

3. The method according to claim 1 , wherein the first programming voltage is within a range of 13V to 22V.

4. The method according to claim 1 , wherein the first programming voltage is 16V.

5. The method according to claim 1 , wherein the pre-programming is performed such that the highest threshold voltage exceeds 0V.

6. The method according to claim 1 , wherein the step of measuring the highest threshold voltage includes:

applying a scan bias to the selected memory cell after the pre-programming; and

checking the selected memory cell is passed.

7. The method according to claim 6 , wherein the checking the selected memory cell is not passed, rechecking the selected memory cell adding a step bias to the scan bias.

8. The method according to claim 7 , further comprising:

repeating the applying, checking, and adding the step bias until the selected memory cell is passed.

9. The method according to claim 7 , wherein the step bias is at a level of 0.05V to 0.8V.

10. The method according to claim 6 , wherein an initial level of the scan bias is 0V.

11. The method according to claim 1 , wherein the highest threshold voltage of the target threshold voltage distribution is set such that a highest threshold voltage of the threshold voltage distribution, which has been increased by cycling, does not exceed a read voltage used for a read operation.

12. The method according to claim 1 , wherein the highest threshold voltage of the target threshold voltage distribution is 1V to 3V lower than a read voltage level.

13. A method for programming a flash memory device, the method comprising:

performing pre-programming to a selected memory cell using a first programming voltage;

measuring a highest threshold voltage of the selected memory cell after the pre-programming;

calculating a difference between the highest threshold voltage and a target highest threshold voltage of a target threshold voltage distribution;

setting a start bias by adding the difference to the first programming voltage;

performing the programming operation using the start bias as an initial programming bias; and

verifying the selected memory cell.

14. The method of claim 13 , wherein the programming bias is applied a plurality of times, the programming bias being incremented by a predetermined level after each time the programming is applied until a last bias is reached.

15. The method of claim 14 , wherein a verification bias for programming verification is applied to the selected memory cell each time after the program bias is applied to the selected memory cell.

16. The method according to claim 13 , wherein the first programming voltage is within a range of 13V to 22V.

17. The method according to claim 13 , wherein the first programming voltage is 16V.

18. The method according to claim 13 , wherein the pre-programming is performed such that the highest threshold voltage exceeds 0V.

19. The method according to claim 11 , wherein the measuring the highest threshold voltage includes:

applying a scan bias to the selected memory cell after the pre-programming;

checking the selected memory cell is passed;

rechecking the selected memory cell adding a step bias to the scan bias when the selected memory cell is not passed; and

repeating the applying, checking, and adding the step bias until the selected memory cell is passed.

20. The method according to claim 19 , wherein an initial level of the scan bias is 0V.

21. The method according to claim 19 , wherein the step scan bias is at a level of 0.05V to 0.8V.

22. The method according to claim 12 , wherein the highest threshold voltage of the target threshold voltage distribution is set such that a highest threshold voltage of the threshold voltage distribution, which has been increased by cycling, does not exceed a read voltage used for a read operation.

23. The method according to claim 12 , wherein the highest threshold voltage of the target threshold voltage distribution is 1V to 3V lower than a read voltage level.

Assignments (1)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Aug 25, 2007
From: KIM, SUK KYUNG
To: HYNIX SEMICONDUCTOR INC.
Reel/Frame 019745/0847 →
Priority Claims (1)
KR 10-2006-0108441 · Nov 3, 2006 · national
Continuity (1)
Related Publication 20080106944A1 · May 8, 2008