IP Library Granted Patent US 7,595,238
Granted Patent B2
US 7,595,238 · App. 11/775,123 · Granted Sep 29, 2009

Trench MOS type silicon carbide semiconductor device and method for manufacturing the same

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Quick Facts
Patent No.
US 7,595,238
App. No.
11/775,123
Granted
Sep 29, 2009
Kind
B2
Abstract

A trench MOS type SiC semiconductor device includes a first conductivity semiconductor substrate, a first conductivity drift layer on the substrate, a second conductivity base layer on the drift layer, a first conductivity source layer on the base layer, a stripe shaped trench reaching from the surface of the source layer to the drift layer and having a gate electrode via a gate oxide film, a second conductivity layer on the bottom of the trench, and a second conductivity type region thereon on across-the-width side walls of at least one end of the trench, electrically coupling the second conductivity layer with the base layer. The device and method for manufacturing the same allow a low on-resistance without newly forming an electrode connected to the second conductivity layer even in the case of a device in which the second conductivity layer has to be grounded.

Claims (21)

1. A method for manufacturing a trench MOS type SiC semiconductor device, comprising the steps of:

providing a first conductivity type semiconductor substrate,

forming a first conductivity type drift layer on the first conductivity type semiconductor substrate,

forming a second conductivity type base layer on the first conductivity type drift layer,

forming a first conductivity type source layer on the second conductivity type base layer,

forming a stripe shaped trench reaching from the surface of the first conductivity type source layer to the first conductivity type drift layer,

forming a second conductivity type layer on the bottom of the stripe shaped trench,

forming a second conductivity type region on the second conductivity type layer and on across-the-width side walls of at least a first end of the stripe shaped trench, and using the second conductivity type region so as to electrically couple the second conductivity type layer with the second conductivity type base layer, and

forming a gate oxide film and then a gate electrode in said trench.

2. The method of manufacturing according to claim 1 , wherein the step of forming the second conductivity type region on the second conductivity type layer and on the across-the-width side walls of at least the first end of the stripe shaped trench comprises performing an ion implantation of an ion species so as to electrically couple the second conductivity type layer with the second conductivity type base layer.

3. The method of manufacturing according to claim 2 , wherein the ion implantation comprises implanting the ion species in directions of perpendicularity and tilt to a principal surface of the first conductivity type semiconductor substrate.

4. A method for manufacturing a trench MOS type SiC semiconductor device, comprising the steps of:

providing a first conductivity type semiconductor substrate,

forming a first conductivity type drift layer on the first conductivity type semiconductor substrate,

forming a second conductivity type base layer on the first conductivity type drift layer,

forming a first conductivity type source layer on the second conductivity type base layer,

forming a stripe shaped trench reaching from the surface of the first conductivity type source layer to the first conductivity type drift layer,

forming a second conductivity type layer on the bottom of the stripe shaped trench,

forming a TaC film used as a mask for selectively forming a second conductivity type region on the second conductivity type layer and on across-the-width side walls of at least a first end of the stripe shaped trench to electrically couple the second conductivity type layer with the second conductivity type base layer,

forming the second conductivity type region on the second conductivity type layer and on the across-the-width side walls of at least the first end of the stripe shaped trench by selectively growing epitaxial SiC to electrically couple the second conductivity type layer with the second conductivity type base layer, and

forming a gate oxide film and then a gate electrode in said trench.

Assignments (3)
MERGER AND CHANGE OF NAME Recorded Aug 26, 2011
From: FUJI ELECTRIC SYSTEMS CO., LTD. (FES); FUJI TECHNOSURVEY CO., LTD. (MERGER BY ABSORPTION)
To: FUJI ELECTRIC CO., LTD.
Reel/Frame 026970/0872 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Apr 20, 2010
From: FUJI ELECTRIC DEVICE TECHNOLOGY CO., LTD.
To: FUJI ELECTRIC SYSTEMS CO., LTD.
Reel/Frame 024252/0451 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Sep 26, 2007
From: TSUJI, TAKASHI
To: FUJI ELECTRIC HOLDINGS CO., LTD
Reel/Frame 019913/0203 →