IP Library Granted Patent US 7,981,759
Granted Patent B2
US 7,981,759 · App. 11/776,116 · Granted Jul 19, 2011

Local oxidation of silicon planarization for polysilicon layers under thin film structures

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Quick Facts
Patent No.
US 7,981,759
App. No.
11/776,116
Granted
Jul 19, 2011
Kind
B2
Abstract

In accordance with the teachings described herein, a method for fabricating a patterned polysilicon layer having a planar surface may include the steps of: depositing a polysilicon film above a substrate material; depositing an oxide-resistant mask over the polysilicon film; patterning and etching the oxide-resistant mask to form a patterned mask layer over the polysilicon film, such that the polysilicon film includes masked and unmasked portions; etching the unmasked portions of the polysilicon film for a first amount of time; oxidizing the etched polysilicon film for a second amount of time to form an oxide layer that defines the patterned polysilicon layer; and removing the patterned mask layer; wherein the first and second amounts of time are selected such that the oxide layer and the patterned polysilicon layer have about the same thickness and form a planar surface.

Claims (40)

1. A method for fabricating a patterned polysilicon layer having a planar surface, comprising:

depositing a polysilicon film above a substrate material;

depositing an oxide-resistant mask over the polysilicon film;

patterning and etching the oxide-resistant mask to form a patterned mask layer over the polysilicon film, such that the polysilicon film includes masked and unmasked portions;

etching the unmasked portion of the polysilicon film for a first amount of time to define a pattern in the masked portion of the polysilicon film;

oxidizing the etched polysilicon film for a second amount of time to form an oxide layer that is coplanar with the patterned polysilicon film;

removing the patterned mask layer;

fabricating a tunable capacitor over the patterned polysilicon layer;

wherein the first and second amounts of time are selected such that the oxide layer and the patterned polysilicon film have about the same thickness and form a planar surface.

2. The method of claim 1 , further comprising:

depositing a layer of dielectric material on the substrate material before depositing the polysilicon film, wherein the polysilicon film is deposited on the dielectric material.

3. The method of claim 1 , further comprising:

depositing one or more layers of spin-on-glass over the patterned polysilicon layer.

4. The method of claim 1 , wherein the substrate material is selected from a group of substrate materials consisting of silicon, alumina, ceramic, and sapphire.

5. The method of claim 1 , wherein the oxide-resistant mask is silicon nitride.

6. The method of claim 1 , wherein the oxide-resistant mask is patterned using photolithography.

7. The method of claim 1 , wherein the oxide-resistant mask is etched using a dry etching technique.

8. The method of claim 1 , wherein the first amount of time is selected to etch the unmasked portions of the polysilicon film to about half of the thickness of the masked polysilicon film.

9. The method of claim 1 , wherein the oxidation consumes the entire unmasked portion of the polysilicon film.

10. The method of claim 1 , wherein the patterned polysilicon film is 0.2 um thick and the oxide layer is 0.2 um +/−0.02 um thick.

11. The method of claim 1 , wherein the patterned mask layer is removed using phosphoric acid.

12. A method for fabricating a patterned polysilicon layer having a planar surface, comprising:

depositing a polysilicon film above a substrate material;

depositing an oxide-resistant mask over the polysilicon film;

patterning and etching the oxide-resistant mask to form a patterned mask layer over the polysilicon film, such that the polysilicon film includes masked and unmasked portions;

etching the unmasked portion of the polysilicon film for a first amount of time to define a pattern in the masked portion of the polysilicon film;

oxidizing the etched polysilicon film for a second amount of time to form an oxide layer that is coplanar with the patterned polysilicon film;

removing the patterned mask layer;

wherein the first and second amounts of time are selected such that the oxide layer and the patterned polysilicon film have about the same thickness and form a planar surface,

wherein the patterned polysilicon layer forms one or more thin film resistors.

13. The method of claim 12 , further comprising:

depositing a layer of dielectric material on the substrate material before depositing the polysilicon film, wherein the polysilicon film is deposited on the dielectric material.

14. The method of claim 12 , further comprising:

depositing one or more layers of spin-on-glass over the patterned polysilicon layer.

15. The method of claim 12 , wherein the substrate material is selected from a group of substrate materials consisting of silicon, alumina, ceramic, and sapphire.

16. The method of claim 12 , wherein the oxide-resistant mask is silicon nitride.

17. The method of claim 12 , wherein the oxide-resistant mask is patterned using photolithography.

18. The method of claim 12 , wherein the oxide-resistant mask is etched using a dry etching technique.

19. The method of claim 12 , wherein the first amount of time is selected to etch the unmasked portions of the polysilicon film to about half of the thickness of the masked polysilicon film.

20. The method of claim 12 , wherein the oxidation consumes the entire unmasked portion of the polysilicon film.

Assignments (6)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Mar 5, 2020
From: BLACKBERRY LIMITED
To: NXP USA, INC.
Reel/Frame 052095/0443 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Jul 30, 2013
From: RESEARCH IN MOTION RF, INC.
To: RESEARCH IN MOTION CORPORATION
Reel/Frame 030909/0908 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Jul 30, 2013
From: RESEARCH IN MOTION CORPORATION
To: BLACKBERRY LIMITED
Reel/Frame 030909/0933 →
CHANGE OF NAME Recorded Jul 31, 2012
From: PARATEK MICROWAVE, INC.
To: RESEARCH IN MOTION RF, INC.
Reel/Frame 028686/0432 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Mar 5, 2009
From: GENNUM CORPORATION
To: PARATEK MICROWAVE, INC.
Reel/Frame 022343/0813 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Jul 31, 2007
From: CERVIN-LAWRY, ANDREW; CAPANU, MIRCEA
To: GENNUM CORPORATION
Reel/Frame 019622/0928 →