Method and system for communicating filter compensation coefficients for a digital power control system
View Patent ↗A method and system is provided for programming the digital filter compensation coefficients of a digitally controlled switched mode power supply within a distributed power system. The distributed power system comprises a plurality of point-of-load (POL) regulators each comprising at least one power switch adapted to convey power to a load and a digital controller adapted to control operation of the power switch responsive to a feedback measurement. The digital controller further comprises a digital filter having a transfer function defined by plural filter coefficients. A serial data bus operatively connects each of the plurality of POL regulators. A system controller is connected to the serial data bus and is adapted to communicate digital data to the plurality of POL regulators via the serial data bus. The digital data includes programming data for programming the plural filter coefficients. The system controller further comprises a user interface adapted to receive the programming data therefrom.
1. A point-of-load regulator comprising:
a power conversion circuit for converting an intermediate voltage to an output voltage, said power conversion circuit comprising at least one power switch for conveying power to a load and a digital controller for controlling operation of said at least one power switch responsive to a feedback measurement, said digital controller further comprising:
a digital filter having a transfer function defined by plural filter coefficients;
an analog-to-digital converter providing a digital error signal representing a difference between said output measurement and a reference value, said digital filter providing a digital control output based on a sum of current and previous error signals and previous control outputs;
an error controller for modifying operation of said digital filter upon an error condition; and
a digital pulse width modulator providing a control signal to said at least one power switch, said control signal having a pulse width corresponding to said digital control output;
a serial data bus interface for communicating programming information from an external serial data bus connected thereto; and
a controller connected to said serial data bus interface and said power conversion circuit, said controller being used to determine said plural filter coefficients from programming data received via said serial data bus interface.
2. The point-of-toad regulator of claim 1 , wherein said analog-to-digital converter further comprises a windowed flash analog-to-digital converter.
3. The point-of-load regulator of claim 2 , wherein said windowed flash analog-to-digital converter provides a HIGH signal reflecting a negative saturation of said analog-to-digital converter and a LOW signal reflecting a positive saturation of said analog-to-digital converter.
4. The point-of-load regulator of claim 1 , wherein said digital filter further comprises an infinite impulse response filter.
5. The point-of-load regulator of claim 4 , wherein said infinite impulse response filter provides the following transfer function G(z):
G
(
z
)
=
PWM
(
z
)
VEd
(
z
)
=
C
0
+
C
1
·
z
-
1
+
C
2
·
z
-
2
+
…
+
C
n
·
z
-
n
1
-
B
1
·
z
-
1
-
B
2
·
z
-
2
-
…
-
B
n
·
z
-
n
wherein PWM(z) is the digital control output, VEd(z) is the error signal, C 0 . . . C n are input side coefficients, and B 1 . . . B n are output side coefficients.
6. The point-of-load regulator of claim 1 , wherein said digital filter further comprises a range limiter for clipping said digital control output if upper or lower range limits are reached.
7. The point-of-load regulator of claim 6 , wherein said range limiter provides a limit signal to said error controller if said upper or lower range limits are reached.
8. The point-of-load regulator of claim 1 , wherein said digital controller further comprises a multiplexer coupled to said error controller and to said digital filter, said error controller providing an alternative digital control output to said multiplexer that passes to said digital pulse width modulator upon said error condition.
9. The point-of-load regulator of claim 1 , wherein said error controller is further used to preset at least one of said previous error signals with predetermined values upon said error condition.
10. The point-of-load regulator of claim 1 , wherein said error controller is further adapted used to preset at least one of said previous control outputs with predetermined values upon said error condition.
11. The point-of-load regulator of claim 1 , wherein said error controller is further used to reset at least one of said previous error signals to initial values upon said error condition.
12. The point-of-load regulator of claim 1 , wherein said error controller is further used to reset at least one of said previous control outputs to initial values upon said error condition.
13. The point-of-load regulator of claim 1 , wherein said error condition further comprises a saturation of said analog-to-digital converter.
14. The point-of-load regulator of claim 1 , wherein said error condition further comprises a mathematical overflow of said digital filter.