IP Library Patent Application 11779163
Patent Application
App. No. 11/779,163

TESTER CHANNEL TO MULTIPLE IC TERMINALS

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Quick Facts
Patent No.
US None
App. No.
11/779,163
Abstract

A probe card provides signal paths between integrated circuit (IC) tester channels and probes accessing input and output pads of ICs to be tested. When a single tester channel is to access multiple (N) IC pads, the probe card provides a branching path linking the channel to each of the N IC input pads. Each branch of the test signal distribution path includes a resistor for isolating the IC input pad accessed via that branch from all other branches of the path so that a fault on that IC pad does not substantially affect the voltage of signals appearing on any other IC pad. When a single tester channel is to monitor output signals produced at N IC pads, the resistance in each branch of the signal path linking the pads of the tester channel is uniquely sized to that the voltage of the input signal supplied to the tester channel is a function of the combination of logic states of the signals produced at the N IC pads. The tester channel measures the voltage of its input signal so that the logic state of the signals produced at each of the N IC output pads can be determined from the measured voltage.

Claims (26)

1 - 21 . (canceled)

22 . A method of making a probe assembly, said method comprising:

providing a plurality of electrically interconnected substrates, said substrates providing test signal paths from a plurality of tester channels to a plurality of device contact elements; and

disposing a resistor on one of said substrates in one of said test signal paths.

23 . The method of claim 22 , wherein:

one of said substrates comprises a space transformer,

said resistor is disposed on said space transformer, and

said device contact elements are disposed on said space transformer.

24 . The method of claim 23 further comprising disposing a plurality of resistors on said space transformer, and wherein:

a first of said test signal paths electrically connects a first one of said tester contact with a first set of two or more of said device contact elements, and

first ones of said plurality of resistors are disposed between said first one of said tester contacts and said first set of device contacts.

25 . The method of claim 24 , wherein said first ones of said plurality of resistors provide electrical isolation between said device contact elements of said first set.

26 . The method of claim 22 , wherein said plurality of substrates comprise a probe board on which said tester contacts are disposed, and a probe substrate on which said device contact elements are disposed.

27 . The method of claim 26 further comprising disposing a plurality of resistors on said probe board, and wherein:

a first of said test signal paths electrically connects a first one of said tester contact with a first set of two or more of said device contact elements, and

first ones of said plurality of resistors are disposed between said first one of said tester contacts and said first set of device contacts.

28 . The method of claim 27 , wherein said first ones of said plurality of resistors provide electrical isolation between said device contact elements of said first set.

29 . The method of claim 28 further comprising disposing a plurality of resistors on said probe substrate, and wherein:

a first of said test signal paths electrically connects a first one of said tester contact with a first set of two or more of said device contact elements, and

first ones of said plurality of resistors are disposed between said first one of said tester contacts and said first set of device contacts.

30 . The method of claim 29 , wherein said first ones of said plurality of resistors provide electrical isolation between said device contact elements of said first set.

31 . The method of claim 22 , wherein said plurality of substrates comprise a probe board on which said tester contacts are disposed, a probe substrate on which said device contact elements are disposed, and an interposer disposed between said probe board and said probe substrate.

32 . The method of claim 31 further comprising disposing a plurality of resistors on said interposer, and wherein:

a first of said test signal paths electrically connects a first one of said tester contact with a first set of two or more of said device contact elements, and

first ones of said plurality of resistors are disposed between said first one of said tester contacts and said first set of device contacts.

33 . The method of claim 32 , wherein said first ones of said plurality of resistors provide electrical isolation between said device contact elements of said first set.

Assignments (2)
RELEASE OF SECURITY INTEREST Recorded Aug 7, 2025
From: HSBC BANK USA, NATIONAL ASSOCIATION
To: FORMFACTOR, INC.
Reel/Frame 072853/0001 →
SECURITY INTEREST IN UNITED STATES PATENTS AND TRADEMARKS Recorded Jul 12, 2016
From: FORMFACTOR, INC.; ASTRIA SEMICONDUCTOR HOLDINGS, INC.; CASCADE MICROTECH, INC.; MICRO-PROBE INCORPORATED
To: HSBC BANK USA, NATIONAL ASSOCIATION
Reel/Frame 039184/0280 →