Electronic device including a capacitor and a process of forming the same
An electronic device can include electronic components and an insulating layer overlying the electronic components. The electronic device can also include a capacitor overlying the insulating layer, wherein the capacitor includes a first electrode and a second electrode. The second electrode can include an opening, wherein from a top view, a defect lies within the opening. In another aspect, a process of forming an electronic device can include forming a first capacitor electrode layer over a substrate, forming a dielectric layer over the first capacitor electrode layer, and forming a second capacitor electrode layer over the dielectric layer. The process can also include detecting a defect and removing a first portion of the second capacitor electrode layer corresponding to the defect, wherein a second portion of the second capacitor electrode layer remains over the dielectric layer.
1. A process of forming a workpiece comprising:
forming a first capacitor electrode layer over a substrate including first and second sets of components;
forming a dielectric layer over the first capacitor electrode layer;
forming a second capacitor electrode layer over the dielectric layer;
detecting a defect, the second capacitor electrode layer overlying the defect;
patterning the second capacitor electrode layer to form a second electrode of a first capacitor structure and a second electrode of a second capacitor structure, the first capacitor structure associated with the first set of components and the second capacitor structure associated with the second set of components, wherein substantially none of the second electrode of the first or second capacitor structures directly overlies the defect; and
after patterning the second capacitor electrode layer, patterning the dielectric layer and the first capacitor electrode layer to form a first electrode of the first capacitor structure and a first electrode of the second capacitor structure, wherein the defect overlies or directly contacts the first electrode of the first capacitor structure; and
wherein, when a first integrated circuit is substantially completed:
the first integrated circuit includes the first capacitor structure having a capacitance and includes the first set of components; and
each of the first and second capacitor electrodes of the first capacitor structure is electrically connected to a power supply terminal, a component of the first set of components, or the substrate, the first and second capacitor electrodes are electrically connected to different parts of the integrated circuit.
2. The process of claim 1 , wherein:
the process forms a second integrated circuit including the second capacitor structure including the first capacitor electrode and the second capacitor electrode overlying the first capacitor electrode;
the second capacitor electrode of the first capacitor structure occupies a first amount of area; and
the second capacitor electrode of the second capacitor structure occupies a second amount of area that is greater than the first amount of area.
3. The process of claim 2 , wherein other than the first capacitor structure and the second capacitor structure, the process is performed such that the first integrated circuit and the second integrated circuit are substantially identical.
4. The process of claim 1 , wherein forming the first capacitor electrode layer comprises forming the first capacitor electrode layer over and in direct contact with the defect.
5. The process of claim 1 , wherein the defect is present over the first capacitor electrode layer before forming the second capacitor electrode layer.
6. The process of claim 1 , further comprising:
separating the workpiece to obtain a die including the first capacitor structure; and
packaging the die to form the first integrated circuit.
7. The process of claim 1 , wherein patterning the first capacitor electrode layer and patterning the second capacitor electrode layer are performed such that the first capacitor structure covers most of the area of the first integrated circuit and a transistor structure within the first integrated circuit.
8. The process of claim 1 , further comprising:
locating the defect;
depositing a resist layer over the second capacitor electrode layer; and
removing a first portion of the resist layer overlying the defect, wherein the first portion corresponds to a location of the defect, and a second portion of the resist layer remains over the second capacitor electrode layer.
9. The process of claim 8 , further comprising selectively exposing the first portion of the resist layer using a lithographic tool, wherein selectively exposing is performed before patterning the second capacitor electrode layer.
10. The process of claim 8 , further comprising selectively exposing the first portion of the resist layer using a laser or an energized beam, wherein selectively exposing is performed before patterning the second capacitor electrode layer.
11. The process of claim 8 , wherein patterning the second capacitor electrode layer comprises removing a portion of the second capacitor electrode layer corresponding to the first portion of the resist layer.
12. The process of claim 1 , wherein patterning the first capacitor electrode layer comprises:
forming a masking layer over the first capacitor electrode layer after patterning the second capacitor electrode layer; and
removing an exposed portion of the first capacitor electrode layer to form the first electrodes of the first capacitor structure and the second capacitor structure after patterning the second capacitor electrode layer.
13. The process of claim 2 , wherein before forming the first capacitor electrode layer, the first and second integrated circuits are substantially identical to each other.
14. The process of claim 1 , wherein the first and second capacitor structures have substantially a same capacitance.
15. The process of claim 1 , wherein the first and second capacitor structures have different capacitances.
16. The process of claim 2 wherein, before forming the first capacitor electrode layer, the first and second integrated circuits are different from each other.
17. The process of claim 1 , wherein, the first capacitor electrodes of the first and second capacitor structures occupy substantially a same area.
18. A process of forming a workpiece comprising:
forming a first capacitor electrode layer over a substrate including first and second sets of components;
forming a dielectric layer over the first capacitor electrode layer;
forming a second capacitor electrode layer over the dielectric layer;
detecting a defect;
after detecting, patterning the second capacitor electrode layer to form a second electrode of a first capacitor structure and a second electrode of a second capacitor structure, the first capacitor structure associated with the first set of components and the second capacitor structure associated with the second set of components, wherein substantially none of the second electrode of the first or second capacitor structure directly overlies the defect; and
after patterning the second capacitor electrode layer, patterning the dielectric layer and the first capacitor electrode layer to form a first electrode of the first capacitor structure and a first electrode of the second capacitor structure, wherein the defect overlies or directly contacts the first electrode of the first capacitor structure.
19. The process of claim 18 , wherein:
the second capacitor electrode of the first capacitor structure occupies a first amount of area; and
the second capacitor electrode of the second capacitor structure occupies a second amount of area that is greater than the first amount of area.
20. The process of claim 18 , wherein, the first capacitor electrodes of the first and second capacitor structures occupy substantially a same amount of area.