Process for making a semiconductor device using partial etching
View Patent ↗A method including partially etching a first portion of a first layer, wherein the first layer is a conductive layer, is provided. The method further includes removing at least a portion of a second layer. The method further includes completing etching of said first portion of the conductive layer so that said first portion of the conductive layer is removed. The method further includes completing formation of the semiconductor device.
1. A method for forming a semiconductor device, the method comprising:
forming a dielectric layer;
partially etching a first portion of a first layer overlying the dielectric layer, wherein:
the first layer is a conductive layer;
the first portion comprises a top portion and a bottom portion under the top portion; and
partially etching comprises removing the top portion of the first portion while the bottom portion of the first portion remains;
removing at least a portion of a second layer;
after removing the at least a portion of the second layer, completing etching of the first portion of the first layer so that the bottom portion of the conductive layer is removed after removing at least the portion of the second layer;
forming a third layer in direct contact with the dielectric layer after completely etching the first portion of the first layer, wherein the third layer is another conductive layer; and
completing formation of the semiconductor device, wherein portions of the dielectric layer and the third layer are parts of a transistor.
2. A method as in claim 1 , wherein the second layer comprises a hard mask.
3. A method as in claim 1 , wherein the conductive layer comprises a metal.
4. A method as in claim 3 , wherein the metal comprises at least one of a group consisting of tantalum, titanium, molybdenum, tungsten, zirconium, hafnium, platinum, and magnesium.
5. A method as in claim 1 , wherein the conductive layer comprises at least a compound, wherein the compound comprises at least one of a group consisting of oxygen, nitrogen, carbon, and boron.
6. A method as in claim 1 , wherein the step of partially etching the conductive layer comprises a step of using a dry etch to partially etch the conductive layer.
7. A method as in claim 1 , wherein the step of partially etching the conductive layer comprises a step of using a wet etch to partially etch the conductive layer.
8. A method as in claim 1 , wherein the step of completing etching of the conductive layer comprises a step of using a wet etch to compete etching of the conductive layer.
9. A method as in claim 1 , further comprising forming the hard mask, wherein forming the hard mask further comprises:
forming the second layer;
forming a patterned resist layer over the second layer; and
removing part of the second layer to form the hard mask.
10. A method as in claim 9 , further comprising removing the patterned resist layer before partially etching the first portion of the first layer.
11. A method as in claim 1 , wherein the second layer comprises silicon, silicon nitride, or a metal.
12. A method as in claim 1 , wherein:
the first layer has a work function closer to a silicon conduction band as compared to the third layer; and
the third layer has a work function closer to a silicon valence band as compared to the first layer.
13. A method for forming a semiconductor device, the method comprising:
forming a first conductive layer, the first conductive layer having a first portion and a second portion;
forming a hard mask overlying the second portion of the first conductive layer;
partially etching the first portion of the first conductive layer which is exposed through the hard mask;
removing the hard mask;
after removing the hard mask, completing etching of the first portion of the conductive layer so that the first portion of the conductive layer is removed;
forming a second conductive layer, wherein at least a portion of the second conductive layer is used in a gate stack of the semiconductor device; and
completing formation of the semiconductor device.
14. A method as in claim 13 , wherein said step of completing etching of the first portion of the conductive layer comprises partially etching the second portion of the conductive layer.
15. A method as in claim 13 , wherein the gate stack comprises at least a portion of the second portion of the first conductive layer.
16. A method as in claim 13 , wherein a thickness of the first conductive layer is in a range of 1-20 nanometers.
17. A method as in claim 13 , wherein forming the hard mask further comprises:
forming a hard mask layer;
forming a patterned resist layer over the hard mask layer; and
removing a portion of the hard mask layer to form the hard mask.
18. A method as in claim 17 , further comprising removing the patterned resist layer before partially etching the first portion of the first conductive layer.
19. A method as in claim 13 , wherein the hard mask comprises silicon, silicon nitride, or a metal.
20. A method as in claim 13 , further comprising forming a gate dielectric layer before forming the first conductive layer, wherein:
the gate dielectric layer is not exposed when removing the hard mask; and
a portion of the gate dielectric layer that is not covered by the hard mask during partially etching is part of a transistor after completing formation of the semiconductor device.