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App. No. 11/797,545 · Confirmation No. 8948

Method and device of generating test circuit for semiconductor device

Inventor: Ryota Nishikawa
Abandoned -- Failure to Respond to an Office Action View Publication ↗
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2010-03-04 ABN Abandonment 2 View
2009-07-08 CTNF Non-Final Rejection 13 View
2009-07-08 892 List of references cited by examiner 1 View
2009-07-08 BIB Bibliographic Data Sheet 1 View
2009-07-08 SRFW Search information including classification, databases and other search related notes 1 View
2009-07-08 FWCLM Index of Claims 2 View
2009-07-08 SRNT Examiner's search strategy and results 6 View
2009-07-08 1449 List of References cited by applicant and considered by examiner 2 View
2007-11-29 NTC.PUB Notice of Publication 1 View
2007-05-30 APP.FILE.REC Filing Receipt 3 View
2007-05-04 WFEE Fee Worksheet (SB06) 1 View
2007-05-04 WFEE Fee Worksheet (SB06) 1 View
2007-05-04 TRNA Transmittal of New Application 2 View
2007-05-04 SPEC Specification 39 View
2007-05-04 CLM Claims 15 View
2007-05-04 ABST Abstract 1 View
2007-05-04 DRW Drawings-only black and white line drawings 13 View
2007-05-04 OATH Oath or Declaration filed 2 View
2007-05-04 FRPR Certified Copy of Foreign Priority Application 40 View
2007-05-04 IDS Information Disclosure Statement (IDS) Form (SB08) 2 View
2007-05-04 FOR Foreign Reference 1 View
2007-05-04 136A Authorization for Extension of Time all replies 2 View
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Quick Facts
App. No.
11/797,545
Filed
2007-05-04
Pub. No.
US20070274142A1
Examiner
LE, TOAN K
Art Unit
2824