Granted Patent B2

US 7,975,261 · App. 11/802,902 · Granted Jul 5, 2011

Abstract

Claims (26)

1. A task transition chart display method which is one for displaying a task transition chart of a multi-core processor, comprising:

obtaining internal trace information of a plurality of core processors within the multi-core processor and performance information corresponding to the trace information both from memory;

displaying task transition states of individual core processors simultaneously on the basis of the trace information and also displaying performance information superimposed on the task transition chart by correlating each of a start clock time and an end clock time of a task indicated by the trace information to a number of clock cycles indicated by the performance information; and

temporally synchronizing a plurality of task transition charts of the core processors, each task transition chart indicating a state of a task transition in each core processor, by shifting a first system time of a first core processor among the core processors by a difference between the first system time and a second system time of a second core processor among the core processors when there is a difference between the first and second system times.

2. The task transition chart display method according to claim 1 , displaying:

the number of mis-caching, a memory access conflict, the number of interrupts, the number of execution cycles, the number of memory reads, the number of memory writes, the number of mis-reads of memory, a direct memory access (DMA) execution time and the number of register interferences, all as said performance information.

3. The task transition chart display method according to claim 2 , displaying:

spots where a mis-caching, a memory access conflict, a mis-reading of memory and register interference have occurred by emphasizing the spots, as said performance information.

4. The task transition chart display method according to claim 1 , displaying:

spots where a mis-caching, a memory access conflict, a mis-reading of memory and register interference have occurred by emphasizing the spots, as said performance information.

5. A task transition chart display apparatus which is an apparatus for displaying a task transition chart for an application program operating on a multitask operating system, comprising:

a data obtainment unit configured to obtain trace information indicating the task transition and performance information corresponding to the trace information both from memory;

a monitor configured to display the performance information superimposed on the task transition chart being based on the trace information by correlating each of a start clock time and an end clock time of a task indicated by the trace information to a number of clock cycles indicated by the performance information; and

temporally synchronizing a plurality of task transition charts of the core processors, each task transition chart indicating a state of a task transition in each core processor, by shifting a first system time of a first core processor among the core processors by a difference between the first system time and a second system time of a second core processor among the core processors when there is a difference between the first and second system times.

6. A task transition chart display method which is one for displaying a task transition chart indicating a transition state of a task executed within a multi-core processor system, comprising:

obtaining trace information indicating operation states of a plurality of core processors constituting the multi-core processor system from memory;

calculating a degree of parallelism corresponding to operation states of the plurality of core processors based on the trace information;

temporally synchronizing a plurality of task transition charts of the core processors, each task transition chart indicating a state of a task transition in each core processor, by shifting a first system time of a first core processor among the core processors by a difference between the first system time and a second system time of a second core processor among the core processors when there is a difference between the first and second system times; and

displaying the task transition charts and the degree of parallelism calculated by temporally synchronizing the degree of parallelism with the task transition charts.

7. The task transition chart display method according to claim 6 , displaying a color or pattern corresponding to a value of said degree of parallelism as data indicating the degree of parallelism.

8. The task transition chart display method according to claim 7 calculating said degree of parallelism for each of predetermined time interval and corresponding to an operation state of said plurality of core processors.

9. The task transition chart display method according to claim 6 calculating said degree of parallelism for each of predetermined time interval and corresponding to an operation state of said plurality of core processors.

10. A task transition chart display apparatus which is an apparatus for displaying a task transition chart indicating a transition state of a task executed within a multi-core processor system, comprising:

a data obtainment unit configured to obtain trace information indicating operation states of a plurality of core processors constituting the multi-core processor system from memory;

a parallelism calculation unit configured to calculate a degree of parallelism corresponding to operation states of the plurality of core processors based on the trace information; and

a monitor configured to temporally synchronize a plurality of task transition charts of the core processors, each task transition chart indicating a state of a task transition in each core processor, by shifting a first system time of a first core processor of the core processors by a difference between the first system time and a second system time of a second core processor of the core processors when there is a difference between the first and second system times, and to display the task transition charts and the calculated degree of parallelism by temporally synchronizing the degree of parallelism with the task transition charts.

Assignments (8)