Method and structure to reduce cracking in flip chip underfill
View Patent ↗A method of assembling a microelectronic flip-chip arrangement includes attaching a chip having a defined length to a supporting substrate, wherein the chip forms a chip shadow line of the defined length on the supporting substrate, creating a first non-wettable zone on an outer portion of the bottom surface of the chip, creating a second non-wettable zone on a portion of the supporting substrate outside the chip shadow line, underfilling the chip and forming a fillet, wherein the fillet does not extend beyond the chip shadow line, and hardening the underfill including the fillet.
1. A method of assembling a microelectronic flip-chip arrangement,
comprising:
attaching a chip having a defined length to a supporting substrate, wherein the chip forms a chip shadow line of the defined length on the supporting substrate;
creating a first non-wettable zone on an outer portion of the bottom surface of the chip;
creating a second non-wettable zone on a portion of the supporting substrate outside the chip shadow line;
underfilling the chip with an underfill material and forming a fillet, wherein the fillet does not extend beyond the chip shadow line; and
hardening the underfill including the fillet.
2. The method of claim 1 , wherein attaching the chip further comprises
bumping the chip with solder bump interconnections and simultaneously heating the chip, solder bump interconnections, and supporting substrate.
3. The method of claim 1 , wherein creating the first and second non-wettable zones comprises treating the chip and the supporting substrate to form a surface to which the underfill material cannot adhere.
4. The method of claim 1 , wherein the underfill material is a polymeric material.
5. The method of claim 4 , wherein hardening the underfill material comprises curing the polymeric material to form cross-links.
6. The method of claim 1 , wherein the underfill material is a cyanate ester epoxy resin.
7. The method of claim 1 , wherein the chip is a silicon chip.
8. The method of claim 1 , wherein attaching the chip comprises a controlled collapse chip connection.
9. A method of assembling a microelectronic flip-chip arrangement,
compromising:
attaching a chip having a defined length to a supporting substrate, wherein the chips forms a chip shadow line of the defined length on the supporting substrate;
underfilling the chip with an underfill material and forming a fillet on the periphery of the chip extending down to the supporting substrate beyond the chip shadow line;
hardening the underfill material including the fillet; and
removing at least a portion of the fillet such that the fillet begins at the bottom surface of the chip extends down to the supporting substrate without extending beyond the chip shadow line.
10. The method of claim 9 , wherein attaching the chip further comprises bumping the chip with solder bump interconnections and simultaneously heating the chip, solder bump interconnections, and supporting substrate.
11. The method of claim 9 , wherein the underfill material is a polymeric material.
12. The method of claim 11 , wherein hardening the underfill material comprises curing the polymeric material to form cross-links.