Carrier board structure with embedded semiconductor chip and fabrication method thereof
A circuit board structure with an embedded semiconductor chip and a fabrication method thereof are provided, including the steps of providing a semiconductor wafer having an active surface with a plurality of electrode pads, a connection metal layer formed on the electrode pads: forming a protective layer on the connection metal layer and the semiconductor wafer, performing a cutting process to form a plurality of semiconductor dies, providing a carrier board having at least one cavity for receiving the semiconductor chip; and forming sequentially on the protective layer covering the semiconductor chip and the carrier board a dielectric layer and a circuit layer electrically connected to the connection metal layer of the semiconductor chip. The present invention is a simple, in process and low in process cost, due to the connection metal layer covered by the protective layer formed on the semiconductor chip protected from oxidation and contamination.
1. A fabrication method of a circuit board structure with an embedded semiconductor chip, comprising the steps of:
providing a semiconductor wafer having an active surface, the active surface having a plurality of electrode pads;
forming a passivation layer on the active surface of the semiconductor chip and surfaces of the electrode pads and the passivation layer formed with openings to expose the electrode pads, followed by forming a plurality of connection metal pads on the electrode pads;
forming a protection layer on the connection metal pads and the passivation layer formed on the active surface of the semiconductor wafer and a surface of the connection metal pads, wherein the protection layer completely covers the surface of the connection metal pads;
cutting the semiconductor wafer and the protection layer to cut the semiconductor wafer into a plurality of semiconductor dies having the protection layer disposed thereon;
providing a carrier board having at least one cavity, and receiving in the cavity at least one semiconductor chip having the protection layer, wherein a gap is formed between the semiconductor chip and the cavity;
forming a dielectric layer on the carrier board and the protection layer, wherein a part of the dielectric layer fills the gap between the semiconductor chip and the cavity;
simultaneously forming through the dielectric layer and the protection layer vias corresponding in position to the connection metal pads of the semiconductor chip by laser so as to expose the connection metal pads; and
forming on the dielectric layer a circuit layer, that has conductive portions disposed in the vias of the dielectric layer and the protection layer, such that the circuit layer is electrically connected to the connection metal pads of the semiconductor chip via the conductive portions.
2. The fabrication method for a circuit board structure with an embedded semiconductor chip of claim 1 , wherein the carrier board is one selected from the group consisting of a circuit board formed with a circuit, an insulating board, and a metal board.
3. The fabrication method for a circuit board structure with an embedded semiconductor chip of claim 1 , wherein the connection metal pads are made of copper.
4. The fabrication method for a circuit board structure with an embedded semiconductor chip of claim 1 , wherein the protection layer is made of one selected from the group consisting of polyimide (PI), epoxy, and Benzocyclobutene (BCB).
5. The fabrication method for a circuit board structure with an embedded semiconductor chip of claim 1 , further comprising the step of forming on the dielectric layer and the circuit layer a circuit build up structure connecting electrically to the circuit layer and having an outer layer formed with a plurality of electrical connection pads.
6. The fabrication method for a circuit board structure with an embedded semiconductor chip of claim 5 , further comprising the steps of forming a solder mask on the outer surface of the circuit build up structure, and forming in the solder mask a plurality of openings for exposing the electrical connection pads.
7. The fabrication method for a circuit board structure with an embedded semiconductor chip of claim 5 , wherein the circuit build up structure comprises at least one dielectric layer, a circuit layer stacked on the dielectric layer, and conductive vias disposed in the dielectric layer.