IP Library Granted Patent US 8,153,019
Granted Patent B2
US 8,153,019 · App. 11/834,258 · Granted Apr 10, 2012

Methods for substantially equalizing rates at which material is removed over an area of a structure or film that includes recesses or crevices

Assignee: Micron Technology, Inc.
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Quick Facts
Patent No.
US 8,153,019
App. No.
11/834,258
Granted
Apr 10, 2012
Kind
B2
Abstract

Methods for preventing isotropic removal of materials at corners formed by seams, keyholes, and other anomalies in films or other structures include use of etch blockers to cover or coat such corners. This covering or coating prevents exposure of the corners to isotropic etch solutions and cleaning solutions and, thus, prevents higher material removal rates at the corners than at smoother areas of the structure or film from which material is removed. Solutions, including wet etchants and cleaning solutions, that include at least one type of etch blocker are also disclosed, as are systems for preventing higher rates of material removal at corners formed by seams, crevices, or recesses in a film or other structure. Semiconductor device structures in which etch blockers are located so as to prevent isotropic etchants from removing material from corners of seams, crevices, or recesses in a surface of a film or other structure at undesirably high rates are also disclosed.

Claims (18)

1. A method for isotropic etching, comprising:

exposing a structure comprising silicon dioxide and having at least one crevice or recess at an exposed surface thereof to a wet etchant consisting of hydrogen fluoride, water, and at least one fluorosurfactant, the at least one fluorosurfactant comprising at least one of CF 3 CF 2 CF 2 CF 2 CF 2 CF 2 CH 2 CH 2 SO 3 X, where X is H or NH 4 , and an ammonium fluoroalkylsulfonate; and

generating pressure waves in the wet etchant to remove the at least one fluorosurfactant from the exposed surface of the structure while the at least one fluorosurfactant remains within the at least one crevice or recess.

2. The method of claim 1 , wherein exposing a structure comprising silicon dioxide and having at least one crevice or recess at an exposed surface thereof to a wet etchant comprises exposing a silicon dioxide shallow trench isolation structure to the wet etchant.

3. The method of claim 1 , further comprising selecting the at least one fluorosurfactant based at least in part upon an isoelectric point of the silicon dioxide.

4. A method for fabricating a semiconductor device structure, comprising:

exposing a film or structure comprising silicon dioxide and having at least one anomaly extending from a substantially smooth surface thereof to a wet etchant consisting of hydrogen fluoride, water, and at least one fluorosurfactant, the at least one fluorosurfactant comprising at least one of CF 3 CF 2 CF 2 CF 2 CF 2 CF 2 CH 2 CH 2 SO 3 X, where X is H or NH 4 , and an ammonium fluoroalkylsulfonate; and

generating pressure waves across a surface of the film or structure.

5. The method of claim 4 , wherein generating pressure waves across a surface of the film or structure comprises removing the fluorosurfactant from substantially smooth surfaces while the fluorosurfactant remains within the at least one anomaly.

6. A method for fabricating a semiconductor device structure, comprising:

applying an etchant mixture consisting of hydrogen fluoride, water, and at least one fluorosurfactant to an exposed surface of a silicon dioxide structure from which material is to be removed, the at least one fluorosurfactant comprising at least one of CF 3 CF 2 CF 2 CF 2 CF 2 CF 2 CH 2 CH 2 SO 3 X, where X is H or NH 4 , and an ammonium fluoroalkylsulfonate and absorbing to surfaces of the silicon dioxide structure defining at least one crevice or recess therein and enabling removal of material from all areas of the exposed surface, including exposed regions of the at least one crevice or recess, at substantially the same rate.

7. The method of claim 6 , wherein applying an etchant mixture comprises applying an etchant mixture having a pH of about 1.5.

8. The method of claim 6 , wherein applying an etchant mixture comprises applying an etchant mixture in which the hydrogen fluoride and water are present in a ratio of about 1:100.

9. The method of claim 6 , wherein applying an etchant mixture comprises applying an etchant mixture including at most about one percent, by volume, of the at least one fluorosurfactant.

10. The method of claim 6 , wherein applying an etchant mixture comprises applying an etchant mixture including at most about twenty percent, by volume, of the at least one fluorosurfactant.

11. The method of claim 1 , wherein generating pressure waves in the wet etchant to remove the at least one fluorosurfactant from the exposed surface of the structure while the at least one fluorosurfactant remains within the at least one crevice or recess comprises removing material from unrecessed surfaces of the structure without removing material from surfaces of the structure defining the at least one crevice or recess.

12. The method of claim 1 , wherein exposing a structure comprising silicon dioxide and having at least one crevice or recess at an exposed surface thereof to a wet etchant comprises exposing a silicon dioxide shallow trench isolation structure having the at least one crevice or recess therein to a wet etchant consisting of hydrogen fluoride, water, and at least one fluorosurfactant to remove material from unrecessed surfaces of the silicon dioxide shallow trench isolation structure.

13. The method of claim 1 , wherein generating pressure waves in the wet etchant to remove the at least one fluorosurfactant from the exposed surface of the structure while the at least one fluorosurfactant remains within the at least one crevice or recess comprises generating pressure waves in the wet etchant in a direction substantially parallel to a major surface of a film that has been conformally deposited to fill at least one contact hole or trench to remove the at least one fluorosurfactant from unrecessed surfaces of the film while the at least one fluorosurfactant remains within the at least one crevice or recess located over the at least one contact hole or trench.

Assignments (8)
RELEASE OF SECURITY INTEREST Recorded Nov 12, 2019
From: JPMORGAN CHASE BANK, N.A., AS COLLATERAL AGENT
To: MICRON TECHNOLOGY, INC.; MICRON SEMICONDUCTOR PRODUCTS, INC.
Reel/Frame 051028/0001 →
RELEASE OF SECURITY INTEREST Recorded Oct 9, 2019
From: MORGAN STANLEY SENIOR FUNDING, INC., AS COLLATERAL AGENT
To: MICRON TECHNOLOGY, INC.
Reel/Frame 050937/0001 →
RELEASE OF SECURITY INTEREST Recorded Aug 23, 2018
From: U.S. BANK NATIONAL ASSOCIATION, AS COLLATERAL AGENT
To: MICRON TECHNOLOGY, INC.
Reel/Frame 047243/0001 →
SECURITY INTEREST Recorded Jul 13, 2018
From: MICRON TECHNOLOGY, INC.; MICRON SEMICONDUCTOR PRODUCTS, INC.
To: JPMORGAN CHASE BANK, N.A., AS COLLATERAL AGENT
Reel/Frame 047540/0001 →
CORRECTIVE ASSIGNMENT TO CORRECT THE REPLACE ERRONEOUSLY FILED PATENT #7358718 WITH THE CORRECT PATENT #7358178 PREVIOUSLY RECORDED ON REEL 038669 FRAME 0001. ASSIGNOR(S) HEREBY CONFIRMS THE SECURITY INTEREST. Recorded Jun 8, 2017
From: MICRON TECHNOLOGY, INC.
To: U.S. BANK NATIONAL ASSOCIATION, AS COLLATERAL AGENT
Reel/Frame 043079/0001 →
PATENT SECURITY AGREEMENT Recorded Jun 2, 2016
From: MICRON TECHNOLOGY, INC.
To: MORGAN STANLEY SENIOR FUNDING, INC., AS COLLATERAL AGENT
Reel/Frame 038954/0001 →
SECURITY INTEREST Recorded May 12, 2016
From: MICRON TECHNOLOGY, INC.
To: U.S. BANK NATIONAL ASSOCIATION, AS COLLATERAL AGENT
Reel/Frame 038669/0001 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Aug 6, 2007
From: SINHA, NISHANT; GREELEY, J. NEIL
To: MICRON TECHNOLOGY, INC.
Reel/Frame 019653/0176 →
Continuity (1)
Related Publication 20090042401A1 · Feb 12, 2009