IP Library Granted Patent US 8,102,049
Granted Patent B2
US 8,102,049 · App. 11/842,973 · Granted Jan 24, 2012

Semiconductor device including through electrode and method of manufacturing the same

Assignee: Renesas Electronics Corporation
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Quick Facts
Patent No.
US 8,102,049
App. No.
11/842,973
Granted
Jan 24, 2012
Kind
B2
Abstract

The present invention provides a semiconductor device including at least one of an insulating layer and a semiconductor layer each including a hole formed therein, and a through electrode provided in the hole. In the semiconductor device, the side wall of the hole is constituted of a first region from the opening of the hole to a predetermined position between the opening of the hole and the bottom surface of the hole, and a second region from the predetermined position to the bottom surface of the hole. The through electrode includes a seed layer and a plating layer. The seed layer covers the second region and the bottom surface of the hole without covering the first region. In addition, the plating layer covers the seed layer and at least a part of the first region.

Claims (29)

1. A semiconductor device, comprising:

at least one of an insulating layer and a semiconductor layer each including a hole formed therein; and

a through electrode provided in the hole,

wherein a side wall of the hole is constituted of a first region from the opening of the hole to a predetermined position between the opening of the hole and the bottom surface of the hole, and a second region which extends from the predetermined position to the bottom surface of the hole, and

wherein the through electrode includes:

a seed layer that covers a whole surface of the second region and the bottom surface of the hole without covering the first region; and

a plating layer which covers the seed layer and at least a part of the first region,

wherein the seed layer comprises a first portion and second portion, the first portion covering the bottom surface of the hole, the second portion covering the whole surface of the second region so as to extend along the side wall of the hole, and

wherein the predetermined position is placed on a level that is higher than a surface of the first portion of the seed layer.

2. The semiconductor device according to claim 1 , wherein the side wall of the hole protrudes towards the outside of the hole.

3. The semiconductor device according to claim 1 , wherein the side wall of the hole includes a plurality of grooves formed therein, each of the plurality of grooves having a ring shape along the circumferential direction of the hole.

4. The semiconductor device according to claim 3 , wherein the seed layer is separated into multiple parts and then intermittently provided for the side wall of the hole.

5. The semiconductor device according to claim 4 , wherein at least one of the plurality of grooves includes the seed layer formed on a portion of the groove, the portion of the groove being on the bottom surface side of the hole.

6. The semiconductor device according to claim 1 , wherein the diameter of the opening of the hole is denoted by L, and

wherein the first region is defined as a region having a length not less than L/10 from the opening of the hole to a position towards the bottom surface of the hole.

7. The semiconductor device according to claim 1 , wherein the diameter of the opening of the hole is denoted by L, and

wherein the first region is defined as a region having a length not less than L/2 from the opening of the hole to a position towards the bottom surface of the hole.

8. The semiconductor device according to claim 1 , wherein the plating layer fills the hole while not protruding from the opening of the hole, and the plating layer includes a conductive material provided thereon.

9. The semiconductor device according to claim 1 , wherein the plating layer fills the hole while protruding from the opening of the hole.

10. The semiconductor device according to claim 1 , wherein the side wall of the hole is covered with one of an insulating film and a multilayered film formed of an insulating film and a barrier film which prevents metal diffusion, and

the seed layer is formed on one of the insulating film and the multilayered film.

11. The semiconductor according to claim 1 , wherein at least one of the insulating layer and the semiconductor layer each including the hole therein is a semiconductor substrate.

12. An apparatus, comprising:

a body;

a hole selectively formed in the body, the body thereby including a first surface defining a side wall of the hole; and

a conductor formed in the hole, the conductor including a seed layer and a plating layer, the seed layer being formed on a part of the first surface and extending along the sidewall of the hole from a bottom end of the sidewall of the hole up to a level that is lower than a tip end of the side wall of the hole,

wherein the plating layer is formed to approximately fill the hole in contact with a portion of the first surface from the seed layer.

13. The apparatus as claimed in claim 12 , wherein the body further includes a second surface defining a bottom of the hole and the seed layer is further formed to cover the second surface.

14. The semiconductor device according to claim 1 , wherein the predetermined position is placed on a position between a surface of the first portion of the seed layer and the opening of the hole.

Assignments (3)
CHANGE OF ADDRESS Recorded Nov 29, 2017
From: RENESAS ELECTRONICS CORPORATION
To: RENESAS ELECTRONICS CORPORATION
Reel/Frame 044928/0001 →
CHANGE OF NAME Recorded Nov 2, 2010
From: NEC ELECTRONICS CORPORATION
To: RENESAS ELECTRONICS CORPORATION
Reel/Frame 025235/0456 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Aug 22, 2007
From: TAKAHASHI, NOBUAKI; KOMURO, MASAHIRO; SOEJIMA, KOJI; MATSUI, SATOSHI; KAWANO, MASAYA
To: NEC ELECTRONICS CORPORATION
Reel/Frame 019728/0359 →
Priority Claims (1)
JP 2006-229923 · Aug 25, 2006 · national
Continuity (1)
Related Publication 20080048337A1 · Feb 28, 2008