IP Library Granted Patent US 7,638,368
Granted Patent B2
US 7,638,368 · App. 11/843,152 · Granted Dec 29, 2009

Reverse blocking semiconductor device and a method for manufacturing the same

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Quick Facts
Patent No.
US 7,638,368
App. No.
11/843,152
Granted
Dec 29, 2009
Kind
B2
Abstract

A reverse blocking semiconductor device that shows no adverse effect of an isolation region on reverse recovery peak current, that has a breakdown withstanding structure exhibiting satisfactory soft recovery, that suppresses aggravation of reverse leakage current, which essentially accompanies a conventional reverse blocking IGBT, and that retains satisfactorily low on-state voltage is disclosed. The device includes a MOS gate structure formed on a n− drift layer, the MOS gate structure including a p+ base layer formed in a front surface region of the drift layer, an n+ emitter region formed in a surface region of the base layer, a gate insulation film covering a surface area of the base layer between the emitter region and the drift layer, and a gate electrode formed on the gate insulation film. An emitter electrode is in contact with both the emitter region and the base layer of the MOS gate structure. A p+ isolation region surrounds the MOS gate structure through the drift layer and extends across whole thickness of the drift layer. A p+ collector layer is formed on a rear surface of the drift layer and connects to a rear side of the isolation region. A distance W is greater than a thickness d, in which the distance W is a distance from an outermost position of a portion of the emitter electrode, the portion being in contact with the base layer, to an innermost position of the isolation region, and the thickness d is a dimension in a depth direction of the drift layer.

Claims (92)

1. A method for manufacturing a reverse blocking semiconductor device comprising:

preparing a substrate of a first conductivity type;

forming a MOS gate structure including processes of selectively forming a base layer of a second conductivity type in a front surface region of the substrate, selectively forming an emitter region of the first conductivity type in a surface region of the base layer, forming a gate insulation film on the surface of the base layer, the surface being between the emitter region and the front surface of the substrate without the emitter region, and forming a gate electrode on the gate insulation film;

forming an emitter electrode in contact with both the emitter region and the base region of the MOS gate structure;

selectively forming a peripheral region of the second conductivity type surrounding the MOS gate structure through a portion of the substrate outside the MOS gate structure, a part of the peripheral region to become an isolation region;

removing a rear surface region of the substrate to a predetermined thickness to form the isolation region extending across the entire thickness and to form a drift layer of the first conductivity type inside the isolation region;

forming a collector layer of the second conductivity type on a rear surface of the drift layer and connecting to a rear side of the isolation region; and

forming a collector electrode in contact with the collector layer;

wherein a distance W is greater than a thickness d, in which the distance W is a distance from an outermost position of an portion of the emitter electrode, the portion being in contact with the base layer, to an innermost position of the isolation region, and the thickness d is a dimension in a depth direction of the drift layer; and

wherein selectively forming the peripheral region being to become an isolation region is conducted by diffusing impurities using a diffusion mask of an oxide film formed on the front surface of the substrate, the oxide film having a thickness Xox satisfying an inequality of the following Formula (1):

X

ox

>

D

ox

D

S

X

S

Formula

(

1

)

wherein

D ox is a diffusion coefficient of the impurity in the oxide film,

D s is a diffusion coefficient of the impurity in material of the substrate, and

X s is a diffusion depth of the impurity in material of the substrate.

2. A method for manufacturing a reverse blocking semiconductor device comprising:

preparing a substrate of a first conductivity type;

forming a MOS gate structure including processes of selectively forming a base layer of a second conductivity type in a front surface region of the substrate, selectively forming an emitter region of the first conductivity type in a surface region of the base layer, forming a gate insulation film on the surface of the base layer, the surface being between the emitter region and the front surface of the substrate without the emitter region, and forming a gate electrode on the gate insulation film;

forming an emitter electrode in contact with both the emitter region and the base region of the MOS gate structure;

selectively forming a peripheral region of the second conductivity type surrounding the MOS gate structure through a portion of the substrate outside the MOS gate structure, a part of the peripheral region to become an isolation region;

introducing lattice defects homogeneously to the entire front surface of the semiconductor device to reduce the lifetime of minority carriers in the semiconductor device, the introducing of the lattice defects being conducted by electron beam irradiation with an energy less than 5 MeV and a dose less than 100 kGy;

removing a rear surface region of the substrate to a predetermined thickness to form the isolation region extending across the entire thickness and to form a drift layer of the first conductivity type inside the isolation region;

forming a collector layer of the second conductivity type on a rear surface of the drift layer and connecting to a rear side of the isolation region; and

forming a collector electrode in contact with the collector layer

wherein a distance W is greater than a thickness d, in which the distance W is a distance from an outermost position of an portion of the emitter electrode, the portion being in contact with the base layer, to an innermost position of the isolation region, and the thickness d is a dimension in a depth direction of the drift layer; and

wherein selectively forming the peripheral region being to become an isolation region is conducted by diffusing impurities using a diffusion mask of an oxide film formed on the front surface of the substrate, the oxide film having a thickness Xox satisfying an inequality of the following Formula (1):

X

ox

>

D

ox

D

S

X

S

Formula

(

1

)

wherein

D OX is a diffusion coefficient of the impurity in the oxide film,

D S is a diffusion coefficient of the impurity in material of the substrate, and

X S is a diffusion depth of the impurity in material of the substrate.

3. A method for manufacturing a reverse blocking semiconductor device comprising step of:

preparing a substrate of a first conductivity type;

forming a MOS gate structure including processes of selectively forming a base layer of a second conductivity type in a front surface region of the substrate, selectively forming an emitter region of the first conductivity type in a surface region of the base layer, forming a gate insulation film on the surface of the base layer, the surface being between the emitter region and the front surface of the substrate without the emitter region, and forming a gate electrode on the gate insulation film;

forming an emitter electrode in contact with both the emitter region and the base region;

selectively forming a peripheral region of the second conductivity type surrounding the MOS gate structure through a portion of the substrate outside the MOS gate structure, a part of the peripheral region being to become an isolation region;

introducing lattice defects at least in the base layer by electron beam irradiation with a dose in a range of 20 kGy to 60 kGy;

removing a rear surface region of the substrate to a predetermined thickness to form the isolation region extending across whole the thickness and to form a drift layer of the first conductivity type inside the isolation region;

forming a collector layer of the second conductivity type on a rear surface of the drift layer and connecting to a rear side of the isolation region; and

forming a collector electrode in contact with the collector layer

wherein a distance W is greater than a thickness d, in which the distance W is a distance from an outermost position of an portion of the emitter electrode, the portion being in contact with the base layer, to an innermost position of the isolation region, and the thickness d is a dimension in a depth direction of the drift layer; and

wherein selectively forming the peripheral region being to become an isolation region is conducted by diffusing impurities using a diffusion mask of an oxide film formed on the front surface of the substrate, the oxide film having a thickness Xox satisfying an inequality of the following Formula (1):

X

ox

>

D

ox

D

S

X

S

Formula

(

1

)

wherein

D OX is a diffusion coefficient of the impurity in the oxide film,

D S is a diffusion coefficient of the impurity in material of the substrate, and

X S is a diffusion depth of the impurity in material of the substrate.

Assignments (2)
MERGER AND CHANGE OF NAME Recorded Aug 26, 2011
From: FUJI ELECTRIC SYSTEMS CO., LTD. (FES); FUJI TECHNOSURVEY CO., LTD. (MERGER BY ABSORPTION)
To: FUJI ELECTRIC CO., LTD.
Reel/Frame 026970/0872 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Apr 20, 2010
From: FUJI ELECTRIC DEVICE TECHNOLOGY CO., LTD.
To: FUJI ELECTRIC SYSTEMS CO., LTD.
Reel/Frame 024252/0451 →