IP Library Granted Patent US 7,547,615
Granted Patent B2
US 7,547,615 · App. 11/843,552 · Granted Jun 16, 2009

Deposition over mixed substrates using trisilane

View Patent ↗
Loading inventors, assignments & file history…
Monitor This Case
Get email alerts when status or documents change.
Order Certified Copies
Most orders are placed with the USPTO same day — all within 24 business hours.
Order via The Patent Place →
Pre-filled with this patent's details
Quick Facts
Patent No.
US 7,547,615
App. No.
11/843,552
Granted
Jun 16, 2009
Kind
B2
Abstract

Trisilane is used in chemical vapor deposition methods to deposit silicon-containing films over mixed substrates. Such methods are useful in semiconductor manufacturing to provide a variety of advantages, including uniform deposition over heterogeneous surfaces, high deposition rates, and higher manufacturing productivity. An example is in forming the base region of a heterojunction bipolar transistor, including simultaneous deposition over both single crystal semiconductor surfaces and amorphous insulating regions.

Claims (23)

1. A method of reducing the number of steps in a semiconductor device manufacturing process, comprising:

identifying a semiconductor device manufacturing process that comprises:

(a) depositing a first silicon-containing film onto a single-crystal surface and a non-epitaxial surface,

(b) forming a mask over the non-epitaxial surface to protect the first silicon-containing film over the non-epitaxial surface,

(c) etching the first silicon-containing film over the single-crystal surface to expose the single-crystal surface, and

(d) depositing a second silicon-containing film onto the exposed single-crystal surface; and

modifying the semiconductor device manufacturing process by eliminating steps (b), (c), and (d) to provide a modified process capable of depositing in a single step a silicon-containing film that is epitaxial on the single-crystal surface and non-epitaxial on the non-epitaxial surface.

2. The method of claim 1 , wherein the modified process comprises using trisilane to deposit in a single step the epitaxial film on the single-crystal surface and the non-epitaxial film on the non-epitaxial surface.

3. The method of claim 2 , wherein the modified process comprises using trisilane in place of a silicon source selected from the group consisting of silane, disilane, dichlorosilane, trichlorosilane and silicon tetrachloride.

4. The method of claim 3 , wherein the modified process comprises using trisilane in place of silane.

5. The method of claim 1 , wherein depositing the first silicon-containing film in the semiconductor device manufacturing process before it is modified comprises depositing a polycrystalline film over the single crystal surface and the non-epitaxial surface.

6. The method of claim 1 , wherein the non-epitaxial surface is amorphous.

7. The method of claim 1 , wherein the non-epitaxial surface is polycrystalline.

8. A method of reducing the number of steps in a semiconductor device manufacturing process, comprising:

identifying a semiconductor device manufacturing process, wherein the semiconductor device manufacturing process comprises

(a) depositing a first silicon-containing film onto a non-epitaxial surface and onto a single-crystal surface using a first silicon source, forming a mask over the non-epitaxial surface, after depositing the first silicon-containing film to protect the first silicon-containing film over the non-epitaxial surface; and etching the first silicon-containing film over the single-crystal surface to expose the single-crystal surface, prior to depositing the second silicon-containing film and, in a separate step,

(b) depositing a second silicon-containing film onto the single-crystal surface using a second silicon source; wherein the first silicon source and the second silicon source are each individually selected from the group consisting of silane, disilane, dichlorosilane, trichlorosilane and silicon tetrachloride; and

modifying the semiconductor device manufacturing process to form a modified process, the modified process comprising using trisilane in place of the first silicon source and the second silicon source, wherein the trisilane is capable of depositing a third silicon-containing film onto the single-crystal surface and the non-epitaxial surface in a single step.

9. A method of reducing the number of steps in a semiconductor device manufacturing process, comprising:

identifying a semiconductor device manufacturing process, wherein the semiconductor device manufacturing process comprises (a) depositing a first silicon-containing film onto a non-epitaxial surface using a first silicon source and, in a separate step, (b) depositing a second silicon-containing film onto a single-crystal surface using a second silicon source; wherein the first silicon source and the second silicon source are silane; and

modifying the semiconductor device manufacturing process to form a modified process, the modified process comprising using trisilane in place of the first silicon source and the second silicon source, wherein the trisilane is capable of depositing a third silicon-containing film onto the single-crystal surface and the non-epitaxial surface in a single step.

10. The method of claim 8 , wherein the modifying of the semiconductor device manufacturing process comprises eliminating the steps of forming the mask and etching.

11. The method of claim 8 , wherein the first silicon-containing film comprises a polycrystalline morphology.

Assignments (1)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Mar 4, 2021
From: ASM AMERICA, INC.
To: ASM IP HOLDING B.V.
Reel/Frame 056465/0280 →