Voltage regulator or non-volatile memories implemented with low-voltage transistors
View Patent ↗A voltage regulator integrated in a chip of semiconductor material is provided. The regulator has a first input terminal for receiving a first voltage and an output terminal for providing a regulated voltage being obtained from the first voltage, the regulator including: a differential amplifier for receiving a comparison voltage and a feedback signal being a function of the regulated voltage, and for proving a regulation signal according to a comparison between the comparison voltage and the feedback signal, the differential amplifier having a first supply terminal being coupled with a reference terminal for receiving a reference voltage and a second supply terminal, a regulation transistor having a control terminal for receiving the regulation signal, and a conduction first terminal and a conduction second terminal being coupled through loading means between the reference terminal and the first input terminal of the regulator, the second terminal of the regulation transistor being coupled with the output terminal of the regulator, wherein the second supply terminal of the differential amplifier is coupled with a second input terminal of the regulator for receiving a second voltage being lower than the first voltage in absolute value, and wherein the regulator further includes a set of auxiliary transistors being connected in series between the second terminal of the regulation transistor and the output terminal of the regulator, and control means for controlling the auxiliary transistors according to the regulated voltage.
1. A voltage regulator integrated in a chip of semiconductor material having a first input terminal for receiving a first voltage and an output terminal for providing a regulated voltage being obtained from the first voltage, the regulator including:
a differential amplifier for receiving a comparison voltage and a feedback signal being a function of the regulated voltage, and for proving a regulation signal according to a comparison between the comparison voltage and the feedback signal, the differential amplifier having a first supply terminal being coupled with a reference terminal for receiving a reference voltage and a second supply terminal,
a regulation transistor having a control terminal for receiving the regulation signal, and a first conduction terminal and a second conduction terminal being coupled through loading means between the reference terminal and the first input terminal of the regulator, the second terminal of the regulation transistor being coupled with the output terminal of the regulator,
wherein the second supply terminal of the differential amplifier is coupled with a second input terminal of the regulator for receiving a second voltage being lower than the first voltage in absolute value, and wherein the regulator further includes a set of auxiliary transistors being connected in series between the second terminal of the regulation transistor and the output terminal of the regulator, and control means for controlling the auxiliary transistors according to the regulated voltage.
2. The regulator according to claim 1 , further including an output transistor having a control terminal being coupled with the second terminal of the regulation transistor through the auxiliary transistors, a first conduction terminal being coupled with the reference terminal through a voltage divider, the first terminal of the output transistor providing the regulated voltage and the voltage divider providing the feedback signal, and a second conduction terminal being coupled with the first input terminal of the regulator through a set of further auxiliary transistors being connected in series, the control means being further adapted to control the further auxiliary transistors according to the first voltage.
3. The regulator according to claim 1 , wherein the differential amplifier, and the auxiliary transistors are adapted to withstand at most the second voltage, the control means controlling the auxiliary transistors further according to the second voltage.
4. The regulator according to claim 1 , wherein each auxiliary transistor comprises a MOSFET, the first terminal comprising a source terminal and the second terminal comprising a drain terminal.
5. The regulator according to claim 2 , wherein the differential amplifier and the further auxiliary transistors are adapted to withstand at most the second voltage the control means controlling the further auxiliary transistors according to the second voltage.
6. The regulator according to claim 2 , wherein each further auxiliary transistor comprises a MOSFET, the first terminal comprising a source terminal and the second terminal comprising a drain terminal.
7. The regulator according to claim 2 , wherein the voltage divider includes means for selecting the regulated voltage, the control means including means for causing the means for selecting to set the regulated voltage to a minimum value at most equal to the second voltage and for setting a set of control signals for the auxiliary transistors to the second voltage and a set of further control signals for the further auxiliary transistors to values increasing from the second voltage by the second voltage moving away from the output transistor, and means for repeating, until the regulated voltage reaches a chosen target value, the operations of causing the means for selecting to increase the regulated voltage by a delta value at most equal to the second voltage, of setting the further control signals lower than a parameter voltage equal to the regulated voltage plus the delta value to the parameter voltage, and of increasing the control signals by the delta value for the auxiliary transistors from a present one to a last one moving away from the regulation transistor, the present auxiliary transistor being incremented by one at each iteration starting from the second one.
8. The regulator according to claim 7 , wherein the delta value is substantially equal to the second voltage minus a threshold voltage of each transistor.
9. The regulator according to claim 7 , wherein the control means including means for enforcing a start-up condition of the regulator by forcing the feedback signal to a value at most equal to the second voltage.
10. A non-volatile memory device including the voltage regulator of claim 1 .
11. The memory device of claim 10 , wherein the second voltage is a supply voltage of the memory device, the memory device further including boosting means for generating the first voltage from the second voltage.
12. A method for operating the voltage regulator of claim 2 , comprising:
setting the regulated voltage to a minimum value at most equal to the second voltage, and setting a set of control signals for the auxiliary transistors to the second voltage and a set of further control signals for the further auxiliary transistors to values increasing from the second voltage by the second voltage moving away from the output transistor, and
repeating, until the regulated voltage reaches a chosen target value, the operations of:
increasing the regulated voltage by a delta value at most equal to the second voltage,
setting the further control signals lower than a parameter voltage equal to the regulated voltage plus the delta value to the parameter voltage, and
increasing the control signals by the delta value for the auxiliary transistors from a present one to a last one moving away from the regulation transistor, the present auxiliary transistor being incremented by one at each iteration starting from the second one.
13. The method according to claim 12 , wherein the delta value is substantially equal to the second voltage minus a threshold voltage of each transistor.
14. The method according to claim 12 , further including the step of: enforcing a start-up condition of the regulator by forcing the feedback signal to a value at most equal to the second voltage.
15. A software program for performing the method of claim 12 when the software program is executed on a logic controller.