IP Library Granted Patent US 7,733,164
Granted Patent B2
US 7,733,164 · App. 11/847,768 · Granted Jun 8, 2010

Semiconductor device with decoupling capacitance controlled and control method for the same

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Quick Facts
Patent No.
US 7,733,164
App. No.
11/847,768
Granted
Jun 8, 2010
Kind
B2
Abstract

In a semiconductor device, a monitoring circuit monitors and detects a quantity of noise in the semiconductor device. A control circuit has capacitances and controls connections to the capacitances such a decoupling capacitance value provided between a first power supply and a second power supply is dynamically adjusted based on the detected noise quantity.

Claims (38)

1. A semiconductor device comprising:

a monitoring circuit configured to monitor and detect a quantity of noise in said semiconductor device;

a control circuit having capacitances and configured to control connections to said capacitances to provide a decoupling capacitance value between a first power supply and a second power supply that is dynamically adjusted based on the detected noise quantity, wherein said control circuit further includes:

a determining circuit configured to generate a capacitance control signal from said detected noise quantity supplied from said monitoring circuit, and

a capacitance control circuit having said capacitances and configured to control the connections to said capacitances in response to the capacitance control signal such the decoupling capacitance value provided between the first power supply and the second power supply is dynamically adjusted,

wherein said capacitance control circuit further includes a capacitance counter configured to perform a count operation in response to said capacitance control signal, to generate an overflow signal when a count value as a result of the count operation overflows, and to generate a capacitance control end signal when the count value does not overflow, and

said determining circuit further includes: a permissible noise counter configured to stop a count operation in response to said capacitance control end signal, and to output a permissible noise quantity which is made larger in response to said overflow signal; and

a comparator configured to compare said detected noise quantity and said permissible noise quantity, and to output said capacitance control signal to said capacitance counter of said capacitance control circuit when said detected noise quantity does not fall within said permissible noise quantity.

2. The semiconductor device according to claim 1 , wherein said capacitance control circuit comprises:

said capacitance counter;

a switch control circuit configured to decode of the count value of said capacitance counter to generate a switch control signal; and

a capacitance array circuit having said capacitances and configured to connect said capacitances between said first and second power supplies in response to said switch control signal.

3. A semiconductor device comprising:

a monitoring circuit configured to monitor and detect a quantity of noise in said semiconductor device;

a control circuit having capacitances and configured to control connections to said capacitances to provide such a decoupling capacitance value provided between a first power supply and a second power supply that is dynamically adjusted based on the detected noise quantity, wherein said control circuit includes:

a determining circuit configured to generate a capacitance control signal from said detected noise quantity supplied from said monitoring circuit, and

a capacitance control circuit having said capacitances and configured to control the connections to said capacitances in response to the capacitance control signal such the decoupling capacitance value provided between the first power supply and the second power supply is dynamically adjusted,

wherein said capacitance control circuit further includes a capacitance counter configured to perform a count operation in response to said capacitance control signal, to hold a count value as a result of the count operation in response to a minimum noise quantity detection signal, and to set the held count value when the count value overflows, and

said determining circuit further includes: a minimum noise quantity holding circuit counter configured to hold said detected noise quantity as a minimum noise quantity in response to a minimum noise quantity detection signal; and a comparator configured to compare said minimum noise quantity and said detected noise quantity to generate said capacitance control signal and said minimum noise quantity detection signal.

4. The semiconductor device according to claim 3 , wherein said capacitance control circuit comprises:

said capacitance counter;

a switch control circuit configured to decode of the count value of said capacitance counter to generate a switch control signal; and

a capacitance array circuit having said capacitances and configured to connect said capacitances between said first and second power supplies in response to said switch control signal.

5. A method of suppressing noise in a semiconductor device, comprising

monitoring and detecting a quantity of noise in said semiconductor device; and

controlling connections to capacitances to provide a decoupling capacitance value between a first power supply and a second power supply that is dynamically adjusted based on the detected noise quantity;

wherein said monitoring and detecting includes:

outputting a reference clock signal for a time period during which an internal clock signal is active;

counting said reference clock signal passed through said AND gate to output an internal clock count value; and

calculating a count value difference between an ideal internal clock count value and the internal clock count value from said counter to output a jitter quantity corresponding to the count value difference as the noise quantity.

6. A method of suppressing noise in a semiconductor device, comprising:

monitoring and detecting a quantity of noise in said semiconductor device; and

controlling connections to capacitances to provide a decoupling capacitance value between a first power supply and a second power supply that is dynamically adjusted based on the detected noise quantity;

wherein said monitoring and detecting includes:

frequency-dividing an internal clock signal;

outputting a reference clock signal for a time period during which the frequency-divided internal clock signal is active;

counting said reference clock signal to output an internal clock count value; and

calculating a count value difference between an ideal internal clock count value and the internal clock count value to output a jitter quantity corresponding to the count value difference as the noise quantity.

Assignments (2)
CHANGE OF NAME Recorded Nov 2, 2010
From: NEC ELECTRONICS CORPORATION
To: RENESAS ELECTRONICS CORPORATION
Reel/Frame 025235/0233 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Sep 6, 2007
From: UMAMICHI, TAKASHI; SHIRAI, KATSUNORI
To: NEC ELECTRONICS CORPORATION
Reel/Frame 019788/0320 →