IP Library Granted Patent US 7,851,874
Granted Patent B2
US 7,851,874 · App. 11/847,930 · Granted Dec 14, 2010

Semiconductor device and method for manufacturing the same

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Quick Facts
Patent No.
US 7,851,874
App. No.
11/847,930
Granted
Dec 14, 2010
Kind
B2
Abstract

A semiconductor device according to an embodiment includes device isolating layers having a top surface lower than a sheet height of a semiconductor substrate; a gate insulating layer and a gate electrode sequentially stacked on the upper surface of an active region of the semiconductor substrate between the device isolating layers; a spacer formed at the side wall of the gate electrode; a source/drain region formed in the semiconductor substrate between the spacer and the device isolating layers; and a silicide film formed on the source/drain region.

Claims (14)

1. A method for manufacturing a semiconductor device, comprising:

forming a device isolating layer on a semiconductor substrate;

forming a gate electrode on the upper surface of an active area of the semiconductor substrate;

etching the device isolating layer to a height lower than a sheet height of the semiconductor substrate such that the topmost surface of the device isolating layer is below the sheet height of the semiconductor substrate;

forming a spacer at the side wall of the gate electrode;

forming a source/drain region between the spacer and the etched device isolating layer; and

forming a silicide film on the source/drain region after etching the device isolating layer,

wherein the silicide film is formed on both a top exposed surface and an exposed side surface of the source/drain region,

wherein forming the gate electrode is performed before etching the device isolating layer.

2. The method according to claim 1 , further comprising:

forming an epitaxial growth layer on the substrate between the spacer and the etched device isolating layer, wherein the silicide film is formed on the epitaxial growth layer on the source/drain region.

3. The method according to claim 2 , further comprising forming the epitaxial growth layer on the gate electrode during forming the epitaxial growth layer on the substrate between the spacer and the etched device isolating layer.

4. The method according to claim 1 , further comprising forming a silicide film on the gate electrode.

5. The method according to claim 4 , wherein the silicide film is simultaneously formed on the source/drain region and the gate electrode.

Assignments (3)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Jul 10, 2019
From: DB HITEK CO., LTD.
To: COLUMBA TECHNOLOGIES INC.
Reel/Frame 049709/0857 →
CHANGE OF NAME Recorded Nov 30, 2017
From: DONGBU HITEK CO., LTD.
To: DB HITEK CO., LTD.
Reel/Frame 044559/0819 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Feb 2, 2008
From: BANG, KI WAN
To: DONGBU HITEK CO., LTD.
Reel/Frame 020457/0503 →