IP Library › Granted Patent US 8,081,625
Granted Patent B2
US 8,081,625 · App. 11/851,574 · Granted Dec 20, 2011

Method and system for utilizing a 10/100/1G/10G base-T PHY device for single channel and shared channel networks

Assignee: Broadcom Corporation
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Quick Facts
Patent No.
US 8,081,625
App. No.
11/851,574
Granted
Dec 20, 2011
Kind
B2
Abstract

Aspects of a method and system for utilizing a 10/100/1G/10GBase-T PHY device for single channel and shared channel networks are provided. In this regard, at least one switching element may be utilized to configure an Ethernet over twisted pair PHY device for communication over a single and/or shared channel. The switching element may enable switching between a transmitter being coupled to a shared channel and a receiver being coupled to a shared channel. Additionally, the switching elements may be based on whether the transmitter is connected to a standard 10/100/1G/10GBase-T network, or to a single and/or shared channel network, for example. In this manner, the configured PHY device may remain compatible with existing Ethernet networks. The PHY device may be configured externally and/or internally. The polarity of transmitted and/or received data may be configured based on a polarity of data received from a shared channel.

Claims (61)

1. A method comprising:

configuring a state of one or more switching elements coupled to an Ethernet over twisted pair device such that said Ethernet over twisted pair device is operable to communicate over a channel which is shared by said Ethernet over twisted pair device and two or more link partners, wherein:

said Ethernet over twisted pair device and said two or more link partners are part of a single collision domain on said shared channel;

a physical layer transceiver (PHY) of said Ethernet over twisted pair device is to communicate with said two or more link partners utilizing one or more of the 10BASE-T standard, the 100BASE-T standard, the 1GBASE-T standard, and the 10GBASE-T standard; and

a MAC controller of said Ethernet over twisted pair device is operable to generate one or more control signals which control said configuring of said state of said one or more switching elements.

2. The method according to claim 1 , wherein said one or more switching elements are operable to:

couple a transmitter and/or a receiver of said Ethernet over twisted pair device to said shared channel; and

decouple said transmitter and/or said receiver of said Ethernet over twisted pair device from said shared channel.

3. The method according to claim 1 , wherein said one or more control signals comprise a transmit enable signal generated by said MAC controller of said Ethernet over twisted pair device.

4. The method according to claim 1 , wherein said configuring of said state of said one or more switching elements is based on how many channels are communicatively coupled to said Ethernet over twisted pair device.

5. The method according to claim 4 , wherein:

said Ethernet over twisted pair device comprises circuitry that generates normal link pulses;

said circuitry that generates normal link pulses is decoupled from an output of said Ethernet over twisted pair device in instances that said Ethernet over twisted pair device is coupled to said shared channel; and

said circuitry that generates normal link pulses is coupled to an output of said Ethernet over twisted pair device in instances that said Ethernet over twisted pair device is coupled to multiple channels.

6. The method according to claim 1 , wherein said one or more switching elements is external to said physical layer transceiver (PHY) of said Ethernet over twisted pair device.

7. The method according to claim 1 , wherein said one or more switching elements is integrated within said physical layer transceiver (PHY) of said Ethernet over twisted pair device.

8. The method according to claim 1 , wherein said configuring of said state of said one or more switching elements is based on a polarity of data received from said shared channel.

9. The method according to claim 1 , comprising utilizing time division multiplexing to control access of said Ethernet over twisted pair device to said shared channel.

10. The method according to claim 1 , comprising designating time intervals during which said Ethernet over twisted pair device may transmit onto said shared channel.

11. A non-transitory machine-readable storage having stored thereon a computer program having at least one code section for computer networking, the at least one code section being executable by a machine for causing the machine to perform steps comprising:

configuring a state of one or more switching elements coupled to an Ethernet over twisted pair device such that said Ethernet over twisted pair device is operable to communicate over a channel which is shared by said Ethernet over twisted pair device and two or more link partners, wherein:

said Ethernet over twisted pair device and said two or more link partners are part of a single collision domain on said shared channel;

a physical layer transceiver (PHY) of said Ethernet over twisted pair device is to communicate with said two or more link partners utilizing one or more of the 10BASE-T standard, the 100BASE-T standard, the 1GBASE-T standard, and the 10GBASE-T standard; and

a MAC controller of said Ethernet over twisted pair device is operable to generate one or more control signals which control said configuring of said state of said one or more switching elements.

12. The machine-readable storage according to claim 11 , wherein said one or more switching elements are operable to:

couple a transmitter and/or a receiver of said Ethernet over twisted pair device to said channel; and

decouple said transmitter and/or said receiver of said Ethernet over twisted pair device from said channel.

13. The machine-readable storage according to claim 11 , wherein said one or more control signals comprise a transmit enable signal generated by said MAC controller of said Ethernet over twisted pair device.

14. The machine-readable storage according to claim 11 , wherein said configuring of said state of said one or more switching elements is based on how many channels are communicatively coupled to said Ethernet over twisted pair device.

15. The machine-readable storage according to claim 14 , wherein:

said Ethernet over twisted pair device comprises circuitry that generates normal link pulses;

said circuitry that generates normal link pulses is decoupled from an output of said Ethernet over twisted pair device in instances that said Ethernet over twisted pair device is coupled to said shared channel; and

said circuitry that generates normal link pulses is coupled to an output of said Ethernet over twisted pair device in instances that said Ethernet over twisted pair device is coupled to multiple channels.

16. The machine-readable storage according to claim 11 , wherein said one or more switching elements is external to said physical layer transceiver (PHY) of said Ethernet over twisted pair device.

17. The machine-readable storage according to claim 11 , wherein said one or more switching elements is integrated within said physical layer transceiver (PHY) of said Ethernet over twisted pair device.

18. The machine-readable storage according to claim 11 , wherein said configuring of said state of said one or more switching elements is based on a polarity of data received from said shared.

19. The machine-readable storage according to claim 11 , wherein said at least one code section comprises code for utilizing time division multiplexing to control access of said Ethernet over twisted pair device to said shared channel.

20. The machine-readable storage according to claim 11 , wherein said at least one code section comprises code for designating time intervals during which said Ethernet over twisted pair device may transmit onto said shared channel.

21. A system comprising:

one or more processors and/or circuits for use with an Ethernet over twisted pair device, said one or more processors and/or circuits comprising an Ethernet physical layer transceiver (PHY), a media access control (MAC) controller, and one or more switching elements coupled to said Ethernet over twisted pair device, said one or processors and/or circuits being operable to:

configure a state of said one or more switching elements coupled to said Ethernet over twisted pair device such that said Ethernet over twisted pair device is operable to communicate over a channel which is shared by said Ethernet over twisted pair device and two or more link partners, wherein:

said Ethernet over twisted pair device and said two or more link partners are part of a single collision domain on said shared channel;

a physical layer transceiver (PHY) of said Ethernet over twisted pair device is to communicate with said two or more link partners utilizing one or more of the 10BASE-T standard, the 100BASE-T standard, the 1GBASE-T standard, and the 10GBASE-T standard; and

said MAC controller of said Ethernet over twisted pair device is operable to generate one or more control signals which control said configuring of said state of said one or more switching elements.

22. The system according to claim 21 , wherein said one or more switching elements are operable to:

couple a transmitter and/or a receiver of said Ethernet over twisted pair device to said channel; and

decouple said transmitter and/or said receiver of said Ethernet over twisted pair device from said channel.

23. The system according to claim 21 , wherein said one or more control signals comprise a transmit enable signal generated by said MAC controller of said Ethernet over twisted pair device.

24. The system according to claim 21 , wherein said configuring of said state of said one or more switching elements is based on how many channels are communicatively coupled to said Ethernet over twisted pair device.

25. The system according to claim 24 , wherein:

said Ethernet over twisted pair device comprises circuitry that generates normal link pulses;

said circuitry that generates normal link pulses is decoupled from an output of said Ethernet over twisted pair device in instances that said Ethernet over twisted pair device is coupled to said shared channel; and

said circuitry that generates normal link pulses is coupled to an output of said Ethernet over twisted pair device in instances that said Ethernet over twisted pair device is coupled to multiple channels.

26. The system according to claim 21 , wherein said one or more switching elements is external to said PHY of said Ethernet over twisted pair device.

27. The system according to claim 21 , wherein said one or more switching elements is integrated within said PHY of said Ethernet over twisted pair device.

28. The system according to claim 21 , wherein said configuring of said state of said one or more switching elements is based on a polarity of data received from said shared channel.

29. The system according to claim 21 , wherein said one or more processors and/or circuits are operable to utilize time division multiplexing to control access of said Ethernet over twisted pair device to said shared channel.

30. The system according to claim 21 , wherein said one or more processors and/or circuits are operable to designate time intervals during which said Ethernet over twisted pair device may transmit onto said channel that is shared by said Ethernet over twisted pair device and two or more link partners.

31. The method according to claim 1 , wherein said one or more switching elements are one or more multiplexers and/or switches that are operable to electrically couple and decouple said Ethernet over twisted pair device and said channel.

32. The machine-readable storage according to claim 11 , wherein said one or more switching elements are one or more multiplexers and/or switches that are operable to electrically couple and decouple said Ethernet over twisted pair device and said channel.

33. The system according to claim 21 , wherein said one or more switching elements are one or more multiplexers and/or switches that are operable to electrically couple and decouple said Ethernet over twisted pair device and said channel.

Assignments (7)
CORRECTIVE ASSIGNMENT TO CORRECT THE PROPERTY NUMBERS PREVIOUSLY RECORDED AT REEL: 47630 FRAME: 344. ASSIGNOR(S) HEREBY CONFIRMS THE ASSIGNMENT. Recorded Mar 21, 2019
From: AVAGO TECHNOLOGIES GENERAL IP (SINGAPORE) PTE. LTD.
To: AVAGO TECHNOLOGIES INTERNATIONAL SALES PTE. LIMITED
Reel/Frame 048883/0267 →
CORRECTIVE ASSIGNMENT TO CORRECT THE EFFECTIVE DATE OF MERGER TO 9/5/2018 PREVIOUSLY RECORDED AT REEL: 047196 FRAME: 0687. ASSIGNOR(S) HEREBY CONFIRMS THE MERGER. Recorded Oct 29, 2018
From: AVAGO TECHNOLOGIES GENERAL IP (SINGAPORE) PTE. LTD.
To: AVAGO TECHNOLOGIES INTERNATIONAL SALES PTE. LIMITED
Reel/Frame 047630/0344 →
MERGER Recorded Oct 4, 2018
From: AVAGO TECHNOLOGIES GENERAL IP (SINGAPORE) PTE. LTD.
To: AVAGO TECHNOLOGIES INTERNATIONAL SALES PTE. LIMITED
Reel/Frame 047196/0687 →
TERMINATION AND RELEASE OF SECURITY INTEREST IN PATENTS Recorded Feb 3, 2017
From: BANK OF AMERICA, N.A., AS COLLATERAL AGENT
To: BROADCOM CORPORATION
Reel/Frame 041712/0001 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Feb 1, 2017
From: BROADCOM CORPORATION
To: AVAGO TECHNOLOGIES GENERAL IP (SINGAPORE) PTE. LTD.
Reel/Frame 041706/0001 →
PATENT SECURITY AGREEMENT Recorded Feb 11, 2016
From: BROADCOM CORPORATION
To: BANK OF AMERICA, N.A., AS COLLATERAL AGENT
Reel/Frame 037806/0001 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Oct 16, 2007
From: POWELL, SCOTT; BERMAN, MARK; CORDARO, JOSEPH LAURENCE; CATALASAN, MANOLITO
To: BROADCOM CORPORATION
Reel/Frame 019968/0418 →
Continuity (2)
Provisional Application 60887674 · Feb 1, 2007
Related Publication 20080186996A1 · Aug 7, 2008