IP Library Granted Patent US 9,407,257
Granted Patent B2
US 9,407,257 · App. 11/855,281 · Granted Aug 2, 2016

Reducing power consumption in a liquid crystal display

Inventors: David Wright (San Diego, CA); Jason Muriby (San Diego, CA); Erhan Hancioglu (San Diego, CA); Harold Kutz (San Jose, CA)
Assignee: Cypress Semiconductor Corporation
H03K17/687H03K19/0016H03K19/00369
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Quick Facts
Patent No.
US 9,407,257
App. No.
11/855,281
Granted
Aug 2, 2016
Kind
B2
Abstract

Embodiments of the invention relate to a method and apparatus to reduce power consumption in a passive matrix LCD driver circuit by using a plurality of drive buffers and active power management of sub-blocks in the passive matrix LCD drive circuit. Each drive buffer may operate in a first phase, which may include a high-drive mode to drive an LCD voltage to a threshold voltage level and a low-drive mode to modify the LCD voltage to approximate an input voltage of the drive buffer, and to maintain a constant LCD voltage level. The low-drive buffer consumes less current than the high-drive buffer, thus reducing power consumption. The drive buffer may also operate in a second phase, also a no-drive mode, in which the drive buffer and the bias voltage generator may be completely turned off, to further reduce power consumption. The drive buffer may be used to drive capacitive loads, as well as partially-resistive loads and inductive loads.

Claims (34)

1. An apparatus, comprising:

a bias voltage generator to generate a plurality of bias voltages; and

a drive buffer to drive a passive liquid crystal display (LCD) pixel or segment from a particular one of the bias voltages, wherein the drive buffer actively drives the passive LCD segment or pixel in a first phase, and wherein the drive buffer comprises:

a first buffer configured to actively drive a voltage, applied to the passive LCD pixel or segment, to a threshold level that is different from the particular one of the bias voltages, wherein the first buffer includes a current source that is configured to drive the voltage applied to the passive LCD pixel or segment to the threshold level; and

a second buffer in parallel with the first buffer configured to actively further modify the voltage, applied to the passive LCD pixel or segment, from the threshold level to approximate the particular one of the bias voltages;

wherein the drive buffer is configured to actively drive the passive LCD segment or pixel by adjusting the voltage, applied to the passive LCD pixel or segment, to approximate the particular one of the bias voltages, and by compensating a leakage associated with the passive LCD pixel or segment to provide a constant voltage at the passive LCD pixel or segment in a low-drive mode; and

wherein the second buffer is activated during the low-drive mode.

2. The apparatus of claim 1 , wherein the second buffer is configured to compensate the leakage associated with the passive LCD pixel or segment to provide the constant voltage at the passive LCD pixel or segment.

3. The apparatus of claim 1 , further comprising a control circuit having a control signal generator configured to generate one or more control signals to select between the first buffer and the second buffer.

4. The apparatus of claim 1 , wherein the driver buffer is configured to actively drive the passive LCD segment or pixel in the first phase by driving the voltage, applied to the passive LCD pixel or segment, to the threshold voltage level in a high-drive mode.

5. The apparatus of claim 4 , where the first buffer is activated during the high-drive mode.

6. The apparatus of claim 1 , wherein the drive buffer is configured to cease to drive the passive LCD segment or pixel during a second phase by ceasing to drive the passive LCD segment or pixel in a no-drive mode when the voltage applied to the passive LCD pixel or segment reaches a desired voltage level.

7. The apparatus of claim 6 , where at least one of the bias voltage generator or the drive buffer is turned off during the no-drive mode.

8. The apparatus of claim 1 , where the second buffer uses an offset cancellation technique.

9. A method, comprising:

generating a plurality of bias voltages that include an input voltage;

actively driving a voltage, applied to a passive liquid crystal display (LCD) segment or pixel, to a threshold level that is different from the input voltage in a first phase using a first buffer, wherein the first buffer includes a current source that is configured to drive the voltage applied to the passive LCD segment or pixel to the threshold level;

actively driving the passive LCD segment or pixel to further modify the voltage, applied to the passive LCD segment or pixel, from the threshold level using a second buffer to approximate the input voltage in the first phase, wherein the second buffer is activated during a low-drive mode in the first phase;

compensating a leakage associated with the passive LCD segment or pixel to maintain the voltage, applied to the passive LCD segment or pixel, at a substantially constant level during the low-drive mode in the first phase; and

ceasing to drive the passive LCD segment or pixel in a second phase.

10. The method of claim 9 , wherein the method includes ceasing to drive the passive LCD segment or pixel after the voltage applied to the passive LCD segment or pixel reaches a desired level in a no-drive mode during the second phase.

11. The method of claim 10 , wherein the method includes actively driving the passive LCD segment or pixel in one of a high-drive mode or the low-drive mode during the first phase.

12. The method of claim 11 , wherein the method includes generating one or more control signals to select one of the high-drive mode, the low-drive mode, or the no-drive mode.

13. The method of claim 11 , wherein the method includes canceling a voltage offset using an amplifier with chopper offset cancellation in the low-drive mode.

14. The method of claim 10 , wherein the method includes turning off at least one of the bias voltage generator and the drive buffer in the no-drive mode.

15. An apparatus, comprising:

means for generating a plurality of bias voltages that include an input voltage;

means for actively driving a voltage, applied to a passive liquid crystal display (LCD) segment or pixel, to a threshold level that is different from the input voltage in a first phase, wherein the means include a current source that is configured to drive the voltage applied to the passive LCD segment or pixel to the threshold level;

means for actively further modifying the voltage, applied to the passive LCD segment or pixel, from the threshold level to approximate the input voltage in the first phase, wherein the means are activated during a low-drive mode in the first phase;

means for compensating a leakage associated with the passive LCD segment or pixel to maintain the voltage applied to the passive LCD segment or pixel at a substantially constant level during the low-drive mode in the first phase; and

means for ceasing to drive the passive LCD segment or pixel in a second phase.

16. The apparatus of claim 15 , wherein the apparatus includes means for ceasing to drive the passive LCD segment or pixel in a no-drive mode during the second phase after the voltage applied to the passive LCD segment or pixel reaches a desired level.

17. The apparatus of claim 16 , wherein the apparatus includes means for actively driving the passive LCD segment or pixel in one of a high-drive mode or the low-drive mode during the first phase.

18. The apparatus of claim 17 , wherein the apparatus includes means for selecting one of the high-drive mode, the low-drive mode, or the no-drive mode.

Assignments (5)
CORRECTIVE ASSIGNMENT TO CORRECT THE 8647899 PREVIOUSLY RECORDED ON REEL 035240 FRAME 0429. ASSIGNOR(S) HEREBY CONFIRMS THE SECURITY INTERST. Recorded Nov 3, 2020
From: CYPRESS SEMICONDUCTOR CORPORATION; SPANSION LLC
To: MORGAN STANLEY SENIOR FUNDING, INC.
Reel/Frame 058002/0470 →
RELEASE OF SECURITY INTEREST Recorded Dec 22, 2017
From: MORGAN STANLEY SENIOR FUNDING, INC
To: CYPRESS SEMICONDUCTOR CORPORATION; SPANSION LLC
Reel/Frame 044949/0962 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Dec 21, 2017
From: CYPRESS SEMICONDUCTOR CORPORATION
To: MONTEREY RESEARCH, LLC
Reel/Frame 044938/0360 →
SECURITY INTEREST Recorded Mar 21, 2015
From: CYPRESS SEMICONDUCTOR CORPORATION; SPANSION LLC
To: MORGAN STANLEY SENIOR FUNDING, INC.
Reel/Frame 035240/0429 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Sep 14, 2007
From: WRIGHT, DAVID; MURIBY, JASON; HANCIOGLU, ERHAN; KUTZ, HAROLD
To: CYPRESS SEMICONDUCTOR CORPORATION
Reel/Frame 019827/0292 →
Continuity (2)
Provisional Application 60912577 · Apr 18, 2007
Related Publication 20080259017A1 · Oct 23, 2008