IP Library Granted Patent US 8,080,874
Granted Patent B1
US 8,080,874 · App. 11/855,826 · Granted Dec 20, 2011

Providing additional space between an integrated circuit and a circuit board for positioning a component therebetween

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Quick Facts
Patent No.
US 8,080,874
App. No.
11/855,826
Granted
Dec 20, 2011
Kind
B1
Abstract

A system, method, and apparatus are included for providing additional space between an integrated circuit package and a circuit board. An integrated circuit package is provided including a plurality of integrated circuit package contacts. Also provided is a circuit board in electrical communication with the integrated circuit package. Further, the integrated circuit package, the integrated circuit contacts, and/or the circuit board is configured for providing additional space between the integrated circuit package and the circuit board to position at least a portion of at least one component between the integrated circuit package and the circuit board.

Claims (19)

1. A system, comprising:

a first integrated circuit package including a plurality of first integrated circuit package contacts;

a circuit board physically coupled to the first integrated circuit package by the plurality of first integrated circuit package contacts;

the circuit board having a first recess, the first recess having a first portion covered by the first integrated circuit package and a second portion not covered by the first integrated circuit package;

a first electronic component mounted to the circuit board in the first recess, wherein at least a first portion of the first electronic component is covered by the first integrated circuit package, and wherein the circuit board has a second recess at an opposite side of the circuit board relative to the first recess; and

a third integrated circuit package including a plurality of third integrated circuit package contacts, wherein the circuit board is physically coupled to the third integrated circuit package by the plurality of third integrated circuit contacts, wherein the second recess in the circuit board has a first portion covered by the third integrated circuit package and a second portion not covered by the third integrated circuit package.

2. The system of claim 1 , wherein the first electronic component is a passive component.

3. The system of claim 1 , wherein the first electronic component is an active component.

4. The system of claim 1 , wherein the first recess is formed around a plurality of circuit board contacts of the circuit board.

5. The system of claim 1 , wherein the first integrated circuit package includes dynamic random access memory (DRAM).

6. The system of claim 1 , wherein the first integrated circuit package consists of an integrated circuit and integrated circuit contacts.

7. The system of claim 1 wherein the entire first electronic component is covered by the first integrated circuit package.

8. The system of claim 1 further comprising:

a second integrated circuit package including a plurality of second integrated circuit package contacts,

wherein the circuit board is physically coupled to the second integrated circuit package by the plurality of second integrated circuit contacts, and

wherein the first recess in the circuit board has a third portion covered by the second integrated circuit package.

9. The system of claim 8 wherein at least a second portion of the first electronic component is covered by the second integrated circuit package.

10. The system of claim 1 further comprising:

a second electronic component mounted to the circuit board in the second recess, wherein at least a first portion of the second electronic component is covered by the first integrated circuit package.

Assignments (4)
CHANGE OF NAME Recorded Oct 2, 2017
From: GOOGLE INC.
To: GOOGLE LLC
Reel/Frame 044101/0405 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Nov 18, 2009
From: METARAM, INC.
To: GOOGLE INC.
Reel/Frame 023525/0835 →
CORRECTIVE ASSIGNMENT TO CORRECT THE ASSIGNMENT PREVIOUSLY RECORDED ON REEL 019833 FRAME 0142. ASSIGNOR(S) HEREBY CONFIRMS THE TENTH ASSIGNORS EXECUTION DOC DATE FROM 09/11/2007 TO 09/12/2007. Recorded Apr 16, 2008
From: WERNER, JEREMY; ROSENBAND, DANIEL L.; PLUNKETT, JEREMY MATTHEW; SCHMIDT, WILLIAM L.; WANG, DAVID T.; ZOHNI, WAEL O.; FEROLITO, PHILIP ARNOLD; SMITH, MICHAEL JOHN SEBASTIAN; RAJAN, SURESH NATARAJAN; FJELSTAD, JOSEPH C.
To: METARAM, INC.
Reel/Frame 020813/0958 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Sep 14, 2007
From: WERNER, JEREMY; ROSENBAND, DANIEL L.; PLUNKETT, JEREMY MATTHEW; SCHMIDT, WILLIAM L.; WANG, DAVID T.; ZOHNI, WAEL O.; FEROLITO, PHILIP ARNOLD; SMITH, MICHAEL JOHN SEBASTIAN; RAJAN, SURESH NATARAJAN; FJELSTAD, JOSEPH C.
To: METARAM, INC.
Reel/Frame 019833/0142 →