IP Library Granted Patent US 8,036,216
Granted Patent B1
US 8,036,216 · App. 11/857,249 · Granted Oct 11, 2011

Method and apparatus for packet cut-through

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Quick Facts
Patent No.
US 8,036,216
App. No.
11/857,249
Granted
Oct 11, 2011
Kind
B1
Abstract

A method and apparatus for packet cut-though have been disclosed. In packet cut-through mode successive packet fragments are associated an identical logical data flow. This allows, for example, a SPI-4 interface to be able to successively transmit a whole packet for a logical port without intervening by traffic of other logical ports.

Claims (17)

1. An apparatus comprising:

a receiver having an input and an output, said input capable of being operatively coupled to receive packet fragments;

a logic block having a first input, a second input, a first output, and a second output, said first input coupled to receive said receiver output, said second input coupled to receive a packet cut-through mode signal, said first output capable of sending fragments;

a queue having an input and an output, said input coupled to said logic block second output;

a complete block having an input and an output said input coupled to said logic block second output; and

a send block having a first input, a second input, and an output, said first input coupled to said queue output, said second input coupled to said complete block output, and said output capable of sending fragments.

2. The apparatus of claim 1 further comprising:

means for determining if said packet cut-through mode signal is active; and

if so then;

means for assembling all packet fragments associated with a packet in said queue; and

means for sending said all packet fragments to one logical data flow via said send block.

3. The apparatus of claim 2 wherein said means for assembling further comprises:

means for examining packet fragments;

means for determining if any of said packet fragments are associated with said packet; and

if so then;

means for queuing up said determined said packet fragments.

4. A non-transitory computer readable storage medium having stored thereon instructions and information, which when executed extracts a representation of the apparatus of claim 2 .

Assignments (3)
RELEASE OF SECURITY INTEREST Recorded Mar 29, 2019
From: JPMORGAN CHASE BANK, N.A.
To: INTEGRATED DEVICE TECHNOLOGY, INC.; GIGPEAK, INC.; CHIPX, INCORPORATED; ENDWAVE CORPORATION; MAGNUM SEMICONDUCTOR, INC.
Reel/Frame 048746/0001 →
SECURITY AGREEMENT Recorded Apr 5, 2017
From: INTEGRATED DEVICE TECHNOLOGY, INC.; GIGPEAK, INC.; MAGNUM SEMICONDUCTOR, INC.; ENDWAVE CORPORATION; CHIPX, INCORPORATED
To: JPMORGAN CHASE BANK, N.A., AS COLLATERAL AGENT
Reel/Frame 042166/0431 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Sep 19, 2007
From: WANG, SIBING
To: INTEGRATED DEVICE TECHNOLOGY, INC.
Reel/Frame 019846/0348 →