IP Library Granted Patent US 8,197,594
Granted Patent B2
US 8,197,594 · App. 11/857,460 · Granted Jun 12, 2012

Silicon wafer for semiconductor and manufacturing method thereof

View Patent ↗
Loading inventors, assignments & file history…
Monitor This Case
Get email alerts when status or documents change.
Order Certified Copies
Most orders are placed with the USPTO same day — all within 24 business hours.
Order via The Patent Place →
Pre-filled with this patent's details
Quick Facts
Patent No.
US 8,197,594
App. No.
11/857,460
Granted
Jun 12, 2012
Kind
B2
Abstract

Silicon wafers having a density of BMDs with sizes between 20 to 40 nm at positions ≧20 μm below the wafer surface in the range of 5×10 11 /cm 3 , and a density of BMDs with sizes of ≧300 nm≦1×10 7 /cm 3 , exhibit reduced slip dislocation and warpage. The wafers are sliced from a crystal grown under specific conditions and then subjected to both low temperature heat-treatment and high temperature anneal.

Claims (16)

1. A silicon wafer having, at a position ≧20 μm or more from a wafer surface, a density of BMDs with sizes of 20 nm to 40 nm in the range of 5×10 11 /cm 3 to 5×10 13 /cm 3 , and having a density of BMDs with sizes of 300 nm or more equal to or less than 1×10 7 /cm 3 .

2. The silicon wafer of claim 1 , which is doped with nitrogen.

3. The silicon wafer of claim 1 , which is doped with hydrogen.

4. The silicon wafer of claim 2 , which is doped with hydrogen.

5. A method for manufacturing a silicon wafer of claim 1 , comprising growing a silicon single crystal ingot while maintaining a cooling rate in a range in which a center temperature of the crystal during crystal growth changes from 1000° C. to 900° C. at a rate of 5° C./min or more; heat treating a wafer sliced from the ingot at a temperature of 400° C. to 850° C. for 30 minutes to 4 hours; high temperature annealing by heat treating the wafer at a temperature of 1100° C. to 1250° C. for 10 minutes to 2 hours under an atmosphere of rare gas having an impurity concentration of 0.5% or less by volume or under a non-oxidizing atmosphere, wherein the thickness of any oxidized film after heat treating is 2 nm or less.

6. The method of claim 5 , wherein the oxygen concentration of the wafer immediately after being sliced from the crystal is in the range of 7×10 17 atoms/cm 3 to 9×10 17 atoms/cm 3 .

7. The method of claim 5 , wherein the nitrogen concentration of the wafer immediately after being sliced from a crystal is in a range of 1×10 13 atoms/cm 3 to 8×10 15 atoms/cm 3 .

8. The method of claim 6 , wherein the nitrogen concentration of the wafer immediately after being sliced from a crystal is in a range of 1×10 13 atoms/cm 3 to 8×10 15 atoms/cm 3 .

9. The manufacturing method of claim 7 , wherein the growth of the silicon single crystal ingot is performed from a melt to which nitrogen is added such that the nitrogen concentration falls in a range of 1×10 16 atoms/cm 3 to 1×10 19 atoms/cm 3 .

10. The manufacturing method of claim 5 , wherein the growth of the silicon single crystal ingot is performed from a melt to which nitrogen is added such that the nitrogen concentration falls in a range of 1×10 16 atoms/cm 3 to 1×10 19 atoms/cm 3 .

11. The method of claim 6 , wherein the hydrogen concentration of the wafer immediately after being sliced from a crystal is in a range of 1×10 12 atoms/cm 3 to 5×10 16 atoms/cm 3 .

12. The method of claim 7 , wherein the hydrogen concentration of the wafer immediately after being sliced from a crystal is in a range of 1×10 12 atoms/cm 3 to 5×10 16 atoms/cm 3 .

13. The method of claim 8 , wherein the hydrogen concentration of the wafer immediately after being sliced from a crystal is in a range of 1×10 12 atoms/cm 3 to 5×10 16 atoms/cm 3 .

14. The method of claim 9 , wherein the hydrogen concentration of the wafer immediately after being sliced from a crystal is in a range of 1×10 12 atoms/cm 3 to 5×10 16 atoms/cm 3 .

15. The method of claim 10 , wherein the growth of the silicon single crystal ingot is performed under an atmosphere where hydrogen gas is continuously introduced such that the concentration of hydrogen is within the range of 0.01% to 3% at a volume ratio.

16. The method of claim 5 , wherein in a further step, a silicon single crystal epi-layer is epitaxially deposited after the high-temperature anneal.

Assignments (3)
CORRECTIVE ASSIGNMENT TO CORRECT THE DATE OF THE CHANGE OF ADDRESS FROM 03/12/2020 TO 12/03/2020 PREVIOUSLY RECORDED AT REEL: 056719 FRAME: 0881. ASSIGNOR(S) HEREBY CONFIRMS THE ASSIGNMENT. Recorded Jul 1, 2021
From: SILTRONIC AG
To: SILTRONIC AG
Reel/Frame 057561/0451 →
CHANGE OF ADDRESS Recorded Jun 30, 2021
From: SILTRONIC AG
To: SILTRONIC AG
Reel/Frame 056719/0881 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Sep 26, 2007
From: NAKAI, KATSUHIKO; VON AMMON, WILFRIED; FUKUSHIMA, SEI; SCHMIDT, HERBERT; WEBER, MARTIN
To: SILTRONIC AG
Reel/Frame 019877/0532 →