IP Library Granted Patent US 7,805,427
Granted Patent B1
US 7,805,427 · App. 11/864,290 · Granted Sep 28, 2010

Integrated search engine devices that support multi-way search trees having multi-column nodes

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Quick Facts
Patent No.
US 7,805,427
App. No.
11/864,290
Granted
Sep 28, 2010
Kind
B1
Abstract

An integrated circuit search engine device supports a multi-way tree of search keys therein. The search engine device includes at least one multi-node sub-engine. The multi-node sub-engine includes a node processor and a plurality of columns of sub-nodes containing search keys. The node processor is configured to distribute an applied search key in parallel to each of the plurality of columns of sub-nodes in response to a search request. The node processor is also configured to receive and resolve corresponding sub-node search results from the plurality of columns of sub-nodes.

Claims (21)

1. An integrated circuit device, comprising:

a search engine configured to store a multi-way tree of search keys using a hierarchy of node sub-engines, wherein the hierarchy of node sub-engines each comprise a node processor and a plurality of columns of sub-nodes containing search keys associated with a corresponding level of the multi-way tree, wherein each node processor, of the hierarchy of node sub-engines, is configured to distribute an applied search key in parallel to each of a corresponding plurality of columns of sub-nodes in response to a search request and is further configured to receive sub-node search results from the corresponding plurality of columns of sub-nodes, and wherein each of the corresponding plurality of columns of sub-nodes is configured to perform a, sub-node search by identifying a respective branching key stored therein and returning a relative relationship between the applied search key and the branching key to the node processor in the same node sub-engine as the corresponding plurality of columns of sub-nodes.

2. The device of claim 1 , wherein said node processor is configured to store child pointers associated with the search keys stored in the corresponding plurality of columns of sub-nodes.

3. The device of claim 1 , wherein each of the corresponding plurality of columns of sub-nodes is configured to perform a sub-node search by identifying a respective branching key stored therein and returning to the node processor: (a) an indicator of position of the branching key within the sub-node and (b) a relative relationship between the applied search key and the branching key as sub-node branching results.

4. The device of claim 3 , wherein said node processor is further configured resolve a node branching result from the plurality of sub-node branching results returned from the corresponding plurality of columns of sub-nodes.

5. The device of claim 4 , wherein said node processor is configured to store child pointers associated with the search keys stored in the corresponding plurality of columns of sub-nodes; and wherein resolving a node branching result from the plurality of sub-node branching results includes identifying a stored child pointer associated with a branching key identified by one of the corresponding plurality of columns of sub-nodes.

6. The device of claim 4 , wherein each of the corresponding plurality of columns of sub-nodes is further configured to perform a sub-node search by passing a best match prefix length to said node processor in the event a first search key in the sub-node matches the applied search key.

7. The device of claim 6 , wherein each of the corresponding plurality of columns of sub-nodes is further configured to perform a sub-node search by passing an indicator of position of the first search key to said node processor.

8. The device of claim 6 , wherein said node processor is configured to store child pointers associated with the search keys stored in the corresponding plurality of columns of sub-nodes.

9. An integrated search engine device, comprising:

a pipelined arrangement of search and tree maintenance sub-engines configured to store corresponding levels of a multi-way tree of search keys therein, said pipelined arrangement of search and tree maintenance sub-engines comprising a node sub-engine associated with a non-leaf level of the multi-way tree, said node sub-engine comprising a node processor and a plurality of columns of sub-nodes containing search keys, said node processor configured to distribute an applied search key in parallel to each of the plurality of columns of sub-nodes in response to a search request received by said node sub-engine and further configured to receive corresponding sub-node search results from the plurality of columns of sub-nodes, wherein each of the plurality of columns of sub-nodes is configured to perform a sub-node search by identifying a respective branching key therein and returning a relative relationship between the applied search key and the branching key to the node processor.

10. The device of claim 9 , wherein said node processor is configured to store child pointers associated with the search keys stored in the plurality of columns of sub-nodes.

11. The device of claim 9 , wherein each of the plurality of columns of sub-nodes is configured to perform a sub-node search by identifying a respective branching key therein and returning an indicator of position of the branching key within the sub-node and a relative relationship between the applied search key and the branching key as sub-node branching results, to the node processor.

12. The device of claim 11 , wherein said node processor is further configured resolve a node branching result from the plurality of sub-node branching results returned from the plurality of columns of sub-nodes.

13. The device of claim 12 , wherein said node processor is configured to store child pointers associated with the search keys stored in the plurality of columns of sub-nodes; and wherein resolving a node branching result from the plurality of sub-node branching results includes identifying a stored child pointer associated with a branching key identified by one of the plurality of columns of sub-nodes.

14. The device of claim 12 , wherein each of the plurality of columns of sub-nodes is further configured to perform a sub-node search by passing a best match prefix length to said node processor in the event a first search key in the sub-node matches the applied search key.

15. An integrated search engine device, comprising:

a pipelined arrangement of search and tree maintenance sub-engines configured to store corresponding levels of a multi-way tree of search keys therein, said pipelined arrangement of search and tree maintenance sub-engines comprising a multi-node sub-engine having a node processor and a plurality of columns of sub-nodes therein, said node processor configured to distribute an applied search key in parallel to each of the plurality of columns of sub-nodes in response to a search request and further configured to receive corresponding sub-node search results from the plurality of columns of sub-nodes, wherein each of the plurality of columns of sub-nodes is configured to perform a sub-node search by identifying a respective branching key therein and returning a relative relationship between the applied search key and the branching key to the node processor.

16. The device of claim 15 , wherein each of the plurality of columns of sub-nodes comprises sub-node memory configured to store search keys associated with multiple nodes of the multi-way tree.

17. The device of claim 15 , wherein said node processor is configured to store child pointers associated with the search keys stored in the plurality of columns of sub-nodes.

18. The device of claim 15 , wherein each of the plurality of columns of sub-nodes is configured to perform a sub-node search by identifying a respective branching key therein and returning an indicator of position of the branching key within the sub-node and a relative relationship between the applied search key and the branching key as sub-node branching results, to the node processor.

Assignments (8)
TERMINATION AND RELEASE OF SECURITY INTEREST IN PATENTS Recorded Feb 3, 2017
From: BANK OF AMERICA, N.A., AS COLLATERAL AGENT
To: BROADCOM CORPORATION
Reel/Frame 041712/0001 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Feb 1, 2017
From: BROADCOM CORPORATION
To: AVAGO TECHNOLOGIES GENERAL IP (SINGAPORE) PTE. LTD.
Reel/Frame 041706/0001 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Apr 16, 2015
From: NETLOGIC I LLC
To: BROADCOM CORPORATION
Reel/Frame 035443/0763 →
CHANGE OF NAME Recorded Apr 16, 2015
From: NETLOGIC MICROSYSTEMS, INC.
To: NETLOGIC I LLC
Reel/Frame 035443/0824 →
RELEASE OF SECURITY INTEREST Recorded Aug 30, 2011
From: SILICON VALLEY BANK
To: NETLOGIC MICROSYSTEMS, INC.; NETLOGIC MICROSYSTEMS INTERNATIONAL LIMITED; NETLOGIC MICROSYSTEMS CAYMANS LIMITED
Reel/Frame 026830/0141 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Jul 23, 2009
From: INTEGRATED DEVICE TECHNOLOGY, INC.
To: NETLOGIC MICROSYSTEMS, INC.
Reel/Frame 022996/0609 →
SECURITY AGREEMENT Recorded Jul 17, 2009
From: NETLOGIC MICROSYSTEMS, INC.; NETLOGIC MICROSYSTEMS INTERNATIONAL LIMITED; NETLOGIC MICROSYSTEMS CAYMANS LIMITED
To: SILICON VALLEY BANK
Reel/Frame 022973/0710 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Sep 28, 2007
From: DEPELTEAU, GARY
To: INTEGRATED DEVICE TECHNOLOGY, INC.
Reel/Frame 019897/0255 →