System and method for equalizing transition density in an integrated circuit
View Patent ↗A system for equalizing transition density in an integrated circuit includes a first circuit configured to transition according to a data stream; and a second circuit configured to transition at a time when the first circuit is not transitioning.
1. A system for equalizing transition density in an integrated circuit, comprising:
a first circuit coupled to a power supply and configured to transition according to first and second instances of a data stream;
a second circuit coupled to the power supply, the second circuit substantially similar to the first circuit, the second circuit configured to transition at a time when the first circuit is not transitioning; and
a decision circuit coupled to the second circuit, the decision circuit configured to receive the first instance of the data stream and the second instance of the data stream, wherein at least one of the first and second instances of the data stream is inverted, the decision circuit configured to provide a transition data stream that is a combination of the first instance of the data stream and the second instance of the data stream.
2. The system of claim 1 , in which the first instance of the data stream is inverted.
3. The system of claim 1 , in which the second instance of the data stream is inverted.
4. The system of claim 1 , in which the first circuit comprises a first shift register and a second shift register, in which every other bit in the second shift register is inverted.
5. The system of claim 4 , in which an output of the second shift register is a transition data stream that causes the second circuit to transition at a time when the first circuit is not transitioning.
6. A method for equalizing transition density in an integrated circuit, comprising:
providing first and second instances of a data stream to a first circuit;
causing the first circuit to transition according to the data stream;
providing the first instance of the data stream and the second instance of the data stream to a decision circuit, wherein at least one of the first and second data stream is inverted;
providing a transition data stream that is a combination of the first instance of the data stream and the second instance of the data stream; and
causing a second circuit to transition according to the transition data stream, wherein the second circuit transitions at a time when the first circuit is not transitioning.
7. The method of claim 6 , in which the first instance of the data stream is inverted.
8. The method of claim 6 , in which the second instance of the data stream is inverted.
9. The method of claim 6 , in which the first circuit comprises a first shift register and a second shift register in which every other bit in the second shift register is inverted.
10. The method of claim 9 , in which an output of the second shift register is a transition data stream that causes the second circuit to transition at a time when the first circuit is not transitioning.
11. An integrated circuit, comprising:
a plurality of circuits in which a first circuit is coupled to a power supply and configured to receive first and second instances of a data stream;
a second circuit coupled to the power supply, the second circuit substantially similar to the first circuit; and
a decision circuit coupled to the second circuit, the decision circuit configured to receive the first instance of the data stream and the second instance of the data stream, wherein at least one of the first and second instances of the data stream is inverted, the decision circuit configured to provide a transition data stream that is a combination of the first instance of the data stream and the second instance of the data stream.
12. The integrated circuit of claim 11 , in which the transition data stream causes the second circuit to transition at a time when the first circuit is not transitioning.
13. The integrated circuit of claim 11 , in which the first instance of the data stream is inverted.
14. The integrated circuit of claim 11 , in which the second instance of the data stream is inverted.
15. A system for equalizing transition density in an integrated circuit, comprising:
a first circuit coupled to a power supply and configured to draw current from the power supply according to first and second instances of a data stream;
a second circuit substantially similar to the first circuit, the second circuit coupled to the power supply and configured to draw current from the power supply at a time when the first circuit is not drawing current from the power supply; and
a decision circuit coupled to the second circuit, the decision circuit configured to receive the first instance of the data stream and the second instance of the data stream, wherein at least one of the first and second instances of the data stream is inverted, the decision circuit configured to provide a transition data stream that is a combination of the first instance of the data stream and the second instance of the data stream.
16. The system of claim 15 in which:
the first circuit comprises a first shift register and a second shift register, in which every other bit in the second shift register is inverted.