IP Library Granted Patent US 7,750,415
Granted Patent B2
US 7,750,415 · App. 11/874,963 · Granted Jul 6, 2010

Structure and method for making high density MOSFET circuits with different height contact lines

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Quick Facts
Patent No.
US 7,750,415
App. No.
11/874,963
Granted
Jul 6, 2010
Kind
B2
Abstract

Embodiments herein present a structure, method, etc. for making high density MOSFET circuits with different height contact lines. The MOSFET circuits include a contact line, a first gate layer situated proximate the contact line, and at least one subsequent gate layer situated over the first gate layer. The contact line includes a height that is less than a combined height of the first gate layer and the subsequent gate layer(s). The MOSFET circuits further include gate spacers situated proximate the gate layers and a single contact line spacer situated proximate the contact line. The gate spacers are taller and thicker than the contact line spacer.

Claims (39)

1. A MOSFET circuit, comprising:

a contact line;

a first gate layer situated proximate said contact line, wherein said contact line comprises a height that is less than a height of said first gate layer;

two contact line spacers situated proximate said contact line, wherein said contact line comprises a height that is less than a height of said first gate layer, and wherein a first dielectric member is situated over said two contact line spacers; and

a second dielectric member situated over said first gate layer, and over at least one gate spacer.

2. The MOSFET circuit according to claim 1 , further comprising:

gate spacers situated proximate said first gate layer; and

a single contact line spacer situated proximate said contact line,

wherein said contact line spacer comprises a height that is less than a height of said gate spacers.

3. The MOSFET circuit according to claim 1 , further comprising:

gate spacers situated proximate said first gate layer; and

a single contact line spacer situated proximate said contact line,

wherein said contact line spacer comprises a thickness that is less than a thickness of said gate spacers.

4. The MOSFET circuit according to claim 1 , further comprising at least one metal via situated proximate said contact line.

5. A MOSFET circuit, comprising:

a contact line;

a first gate layer situated proximate said contact line;

at least one second gate layer situated over said first gate layer;

gate spacers situated proximate said first gate layer and said second gate layer;

less than two contact line spacers situated proximate said contact line, wherein a first dielectric member is situated over said less than two contact line spacers: and

a second dielectric member situated over said first gate layer, and over at least one gate spacer.

6. The MOSFET circuit according to claim 5 , wherein said contact line comprises a height that is less than a combined height of said first gate layer and said second gate layer.

7. The MOSFET circuit according to claim 5 , wherein said less than two contact line spacers comprises a height that is less than a height of said gate spacers.

8. The MOSFET circuit according to claim 5 , wherein said less than two contact line spacers comprises a thickness that is less than a thickness of said gate spacers.

9. The MOSFET circuit according to claim 5 , in which the gate spacers and the contact line spacers are formed from nitride.

10. The MOSFET circuit according to claim 9 , in which the first gate layer comprises polysilicon and metal.

11. The MOSFET circuit according to claim 9 , in which the second gate layer comprises polysilicon germanium.

12. The MOSFET circuit according to claim 5 , further comprising at least one metal via situated proximate said contact line.

13. The MOSFET circuit according to claim 12 , in which the metal via comprises tungsten.

14. A MOSFET circuit, comprising:

a contact line; and

a first gate layer situated proximate said contact line,

wherein said contact line is lower than a top of said first gate layer; and a single contact line spacer situated proximate said contact line;

gate spacers situated proximate said first gate layer, wherein said single contact line spacer comprises a height that is shorter than a height of said gate spacers;

a first dielectric member situated over said single contact line spacer; and

a second dielectric member situated over said first gate layer, and over at least one gate spacer.

15. The MOSFET circuit according to claim 14 , in which the gate spacers and the contact line spacers are formed from nitride.

16. The MOSFET circuit according to claim 14 , in which the first gate layer comprises polysilicon and metal.

17. The MOSFET circuit according to claim 14 , in which the second gate layer comprises polysilicon germanium.

Assignments (1)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Nov 26, 2020
From: INTERNATIONAL BUSINESS MACHINES CORPORATION
To: ELPIS TECHNOLOGIES INC.
Reel/Frame 054528/0023 →