Trimming of operative parameters in electronic devices based on corrections mappings

1. An integrated circuit, comprising:

a storage location operable to store a first adjustment value;

a first decoder coupled to the storage location and operable to decode the first adjustment value;

a first adjuster coupled to the first decoder and operable to adjust a first operating parameter in response to the decoded first adjustment value;

a converter coupled to the storage location and operable to generate from the first adjustment value a second adjustment value;

a second decoder coupled to the converter and operable to decode the second adjustment value;

a second adjuster coupled to the second decoder and operable to adjust a second operating parameter in response to the decoded second adjustment value.

2. The integrated circuit of claim 1 wherein the storage location comprises a register.

3. The integrated circuit of claim 1 wherein the first adjuster comprises an adjustable impedance that is operable to have a value that is related to the first adjustment value.

4. The integrated circuit of claim 1 wherein the second adjuster comprises an adjustable impedance that is operable to have a value that is related to the second adjustment value.

5. An integrated circuit, comprising:

a storage location operable to store an adjustment value;

a first adjuster coupled to the storage location and operable to adjust a first operating parameter in response to the adjustment value;

a converter coupled to the storage location and operable to generate from the adjustment value a modified adjustment value; and

a second adjuster coupled to the converter and operable to adjust a second operating parameter in response to the modified adjustment value,

wherein one of the first and second operating parameters comprises a signal period.

6. An integrated circuit, comprising:

a storage location operable to store an adjustment value;

a first adjuster coupled to the storage location and operable to adjust a first operating parameter in response to the adjustment value;

a converter coupled to the storage location and operable to generate from the adjustment value a modified adjustment value; and

a second adjuster coupled to the converter and operable to adjust a second operating parameter in response to the modified adjustment value,

wherein one of the first and second operating parameters comprises a signal delay.

7. An integrated circuit, comprising:

a first storage location operable to store a first adjustment value;

a first generator coupled to the first storage location, operable to generate a first signal having a first characteristic, and including a first adjuster operable to change the first characteristic in response to the first adjustment value;

a converter coupled to the first storage location and operable to generate from the first adjustment value a modified adjustment value; and

a second generator coupled to the converter, operable to generate a second signal having a second characteristic, and including a second adjuster operable to change the second characteristic in response to the modified adjustment value.

8. The integrated circuit of claim 7 wherein:

the first generator comprises a decoder coupled to the first adjuster and operable to decode the first adjustment value; and

wherein the first adjuster is operable to change the first characteristic in response to the decoded first adjustment value.

9. The integrated circuit of claim 7 wherein:

the second generator comprises a decoder coupled to the second adjuster and operable to decode the modified adjustment value; and

the second adjuster is operable to change the second characteristic in response to the decoded modified adjustment value.

10. The integrated circuit of claim 7 , further comprising:

a second storage location operable to store a second adjustment value; and

wherein the converter is coupled to the second storage location and is operable to generate from the first and second adjustment values the modified adjustment value.

11. The integrated circuit of claim 7 , further comprising:

a second storage location operable to store a second adjustment value;

a third generator coupled to the second storage location, operable to generate a third signal having a third characteristic, and including a third adjuster operable to change the third characteristic in response to the second adjustment value; and

wherein the converter is coupled to the second storage location and is operable to generate from the first and second adjustment values the modified adjustment value.

12. A system, comprising:

a first integrated circuit, comprising,

a storage location operable to store an adjustment value,

a first adjuster coupled to the storage location and operable to adjust a first operating parameter in response to the adjustment value,

a converter coupled to the storage location and operable to generate from the adjustment value a modified adjustment value, and

a second adjuster coupled to the converter and operable to adjust a second operating parameter in response to the modified adjustment value; and

a second integrated circuit coupled to the first integrated circuit.

13. The system of claim 12 , wherein the second integrated circuit comprises a controller.

14. The system of claim 12 wherein the first and second integrated circuits are disposed on a same die.

15. The system of claim 12 wherein the first and second integrated circuits are disposed on respective dies.