Circuit and method for controlling charge injection in radio frequency switches
A circuit and method for controlling charge injection in a circuit are disclosed. In one embodiment, the circuit and method are employed in a semiconductor-on-insulator (SOI) Radio Frequency (RF) switch. In one embodiment, an SOI RF switch comprises a plurality of switching transistors coupled in series, referred to as “stacked” transistors, and implemented as a monolithic integrated circuit on an SOI substrate. Charge injection control elements are coupled to receive injected charge from resistively-isolated nodes located between the switching transistors, and to convey the injected charge to at least one node that is not resistively-isolated. In one embodiment, the charge injection control elements comprise resistors. In another embodiment, the charge injection control elements comprise transistors. A method for controlling charge injection in a switch circuit is disclosed whereby injected charge is generated at resistively-isolated nodes between series coupled switching transistors, and the injected charge is conveyed to at least one node of the switch circuit that is not resistively-isolated.
1. A switch circuit, comprising:
a plurality of switching transistors coupled in series to selectively convey a signal from an input of the series coupled switching transistors to an output of the series coupled switching transistors; the series of switching transistors including:
a plurality of resistively-isolated nodes, each resistively-isolated node located between a different pair of the switching transistors in series; and
at least one non-resistively-isolated node located adjacent to one of the plurality of the switching transistors in series; and
a plurality of charge injection control modules, each control module operatively coupled to a different one of the plurality of resistively-isolated nodes and the at least one non-resistively-isolated node to communicate injected charge from the different one of plurality of resistively-isolated nodes to the at least one non-resistively-isolated node.
2. The switch circuit of claim 1 , wherein each of the switching transistors has an associated and corresponding charge injection control module, the switching transistor drain node coupled to its associated and corresponding charge injection control-module first node and the switching transistor source node coupled to its associated and corresponding charge injection control module second node, and the charge injection control module communicates injected charge between the switching transistor drain node and source node.
3. The switch circuit of claim 1 , wherein each of the switching transistors has an associated and corresponding charge injection control module, the different one of the plurality of resistively-isolated nodes is operatively coupled to the switching transistor drain node and the at least one non-resistively-isolated node is operatively coupled to the switching transistor source node.
4. The switch circuit of claim 3 , wherein each switching transistor includes an accumulated charge sink (ACS) electrically coupled to convey accumulated charge from the ACS to a gate node of the transistor when the transistor operates in an accumulated charge regime.
5. The switch circuit of claim 4 , wherein the switching transistor including a diode, the diode selectively conveying accumulated charge from the ACS to the transistor gate node when the transistor operates in an accumulated charge regime.
6. The switch circuit of claim 2 , wherein each charge injection control element comprises a charge injection control resistor.
7. The switch circuit of claim 6 , further comprising a plurality of gate resistors each having a resistance Rg, wherein a gate of each switching transistor is connected to an associated and corresponding one of the plurality of gate resistors, and wherein the plurality of gate resistors is connected to a control line that conveys a control signal to the gate of each switching transistor, and wherein a resistance Rc of each charge injection control resistor is selected according to a formula 10×RgN>Rc>Rg/10N, and wherein N comprises a number of switching transistors in the plurality of switching transistors.
8. The switch circuit of claim 2 , wherein each charge injection control module includes a switch module having an ON-state and an OFF-state, and wherein a control signal selectively switches the charge injection control modules switch module from the ON-state to the OFF-state to control the communication of injection charge.
9. The switch circuit of claim 8 , wherein the series of switch transistors are switched to an ON-state during a first time interval, and the charge injection control modules switch modules are switched to an ON-state during a second time interval at least partially subsequent to the first time interval.
10. The switch circuit of claim 1 , wherein the switch circuit includes a radio frequency (RF) switch.
11. The switch circuit of claim 4 , wherein the series of switching transistors are operated using a pulse method to control accumulated charge.
12. The switch circuit of claim 1 , wherein each of the plurality of switching transistors includes a semiconductor-on-insulator (SOI) metal-oxide-semiconductor field effect transistor (MOSFET).
13. The switch circuit of claim 12 , wherein the SOI MOSFETs include a silicon-on-sapphire substrate.
14. A method of controlling charge injection in a switch circuit, including:
employing a plurality of switching transistors coupled in series to selectively convey a signal from an input of the series coupled switching transistors to an output of the series coupled switching transistors; the series of switching transistors including:
a plurality of resistively-isolated nodes, each resistively-isolated node located between a different pair of the switching transistors in series; and
at least one non-resistively-isolated node located adjacent to one of the plurality of the switching transistors in series;
generating injected charge at the plurality of resistively-isolated nodes; and
operatively coupling one of a plurality of charge injection control modules to a different one of the plurality of resistively-isolated nodes and the at least one non-resistively-isolated node to communicate injected charge from the different one of plurality of resistively-isolated nodes to the at least one non-resistively-isolated node.
15. The method of claim 14 , wherein each of the switching transistors has an associated and corresponding charge injection control module, coupling the switching transistor drain node to its associated and corresponding charge injection control-module first node and coupling the switching transistor source node to its associated and corresponding charge injection control module second node, and employing the charge injection control module to communicate injected charge between the switching transistor drain node and source node.
16. The method of claim 14 , wherein each of the switching transistors has an associated and corresponding charge injection control module, operatively coupling the different one of the plurality of resistively-isolated nodes to the switching transistor drain node, and operatively coupling the at least one non-resistively-isolated node to the switching transistor source node.
17. The method of claim 16 , wherein each switching transistor includes an accumulated charge sink (ACS) electrically coupled to a gate node of the transistor and communicating accumulated charge from the ACS to a gate node of the transistor when the transistor operates in an accumulated charge regime.
18. The method of claim 17 , wherein the switching transistor including a diode, employing the diode to selectively communicate accumulated charge from the ACS to the transistor gate node when the transistor operates in an accumulated charge regime.
19. The method of claim 15 , wherein each charge injection control element comprises a charge injection control resistor.
20. The method of claim 15 , wherein each charge injection control module includes a switch module having an ON-state and an OFF-state, and selectively switching the charge injection control modules switch module from the ON-state to the OFF-state to control the communication of injection charge.
21. The method of claim 20 , further including switching the series of switch transistors to an ON-state during a first time interval, and switching the charge injection control module switch modules to an ON-state during a second time interval at least partially subsequent to the first time interval.
22. The method of claim 14 , wherein the switch circuit includes a radio frequency (RF) switch.
23. The method of claim 17 , further including operating the series of switching transistors using a pulse method to control accumulated charge.
24. A switch circuit, including:
a plurality of switching transistors coupled in series to selectively convey a signal from an input of the series coupled switching transistors to an output of the series coupled switching transistors; the series of switching transistors including:
a plurality of resistively-isolated nodes, each resistively-isolated node located between a different pair of the switching transistors in series; and
at least one non-resistively-isolated node located adjacent to one of the plurality of the switching transistors in series;
a) means for generating injected charge at the plurality of resistively-isolated nodes; and
b) means, operatively coupled to the generating means, for communicating injected charge from the different one of plurality of resistively-isolated nodes to the at least one non-resistively-isolated node.
25. The switch circuit of claim 24 , wherein the communicating means comprises a plurality of charge injection control modules, and wherein each of the switching transistors has an associated and corresponding charge injection control module, and the switching transistor drain node-coupled to its associated and corresponding charge injection control-module first node and the switching transistor source node coupled to its associated and corresponding charge injection control module second node, and the charge injection control module communicates injected charge between the switching transistor drain node and source node.
26. The switch circuit of claim 24 , wherein each of the switching transistors has an associated and corresponding charge injection control module, the different one of the plurality of resistively-isolated nodes is operatively coupled to the switching transistor drain node and the at least one non-resistively-isolated node is operatively coupled to the switching transistor source node.
27. The switch circuit of claim 25 , wherein each charge injection control element comprises a charge injection control resistor.
28. The switch circuit of claim 27 , further comprising a plurality of gate resistors each having a resistance Rg, wherein a gate of each switching transistor is connected to an associated and corresponding one of the plurality of gate resistors, and wherein the plurality of gate resistors is connected to a control line that conveys a control signal to the gate of each switching transistor, and wherein a resistance Rc of each charge injection control resistor is selected according to a formula 10×Rg/N>Rc>Rg/10N, and wherein N comprises a number of switching transistors in the plurality of switching transistors.
29. The switch circuit of claim 25 , wherein each charge injection control module includes a switch module having an ON-state and an OFF-state, and wherein a control signal selectively switches the charge injection control modules switch module from the ON-state to the OFF-state to control the communication of injection charge.
30. The switch circuit of claim 29 , wherein the series of switch transistors are switched to an ON-state during a first time interval, and the charge injection control modules switch modules are switched to an ON-state during a second time interval at least partially subsequent to the first time interval.
31. The switch circuit of claim 8 , wherein each charge injection control module further includes a control resistor.
32. The switch circuit of claim 31 , further comprising a plurality of gate resistors each having a resistance Rg, wherein a gate node of each switching transistor is connected to an associated and corresponding one of the plurality of gate resistors, and wherein the plurality of gate resistors is connected to a control line that conveys a control signal to the gate of each switching transistor, and wherein a resistance Rc of each control resistor is selected according to a formula 10×Rg/N>Rc>Rg/10N, and wherein N comprises the number of switching transistors in the plurality of switching transistors.
33. The switch circuit of claim 20 , further employing a control resister in each charge injection control module.
34. The switch circuit of claim 29 , wherein each charge injection control module further includes a control resistor.
35. The switch circuit of claim 34 , further comprising a plurality of gate resistors each having a resistance Rg, wherein a gate node of each switching transistor is connected to an associated and corresponding one of the plurality of gate resistors, and wherein the plurality of gate resistors is connected to a control line that conveys a control signal to the gate of each switching transistor, and wherein a resistance Rc of each control resistor is selected according to a formula 10×Rg/N>Rc>Rg/10N, and wherein N comprises the number of switching transistors in the plurality of switching transistors.