IP Library Granted Patent US 8,166,355
Granted Patent B2
US 8,166,355 · App. 11/884,033 · Granted Apr 24, 2012

System and method for mitigating memory requirements

Assignee: Siano Mobile Silicon Ltd.
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Quick Facts
Patent No.
US 8,166,355
App. No.
11/884,033
Granted
Apr 24, 2012
Kind
B2
Abstract

A receiver is provided, which is adapted to receive MPE-FEC frames and to correct erroneous sections within a received MPE-FEC frame by detecting unreliable sections and storing in an erasure list (“ESL”) table compressed data that includes the base address of each detected erroneous section, together with the respective section's size. The size of the ESL table may be fixed, or it may correlate, or dynamically change according to the actual number of detected erroneous sections. The data stored in the erasure list may then be forwarded to a decoder to correct erroneous sections. The erroneous sections may be detected by using CRC, and the decoder may be a Reed-Solomon decoder. If the application data table of the MPE-FEC is error-free (or full or errors), in which case the erasure structure list is empty (or full of errors), in which case the erasure structure list is empty (or full), this means that no FEC reception and error corrections are required, because there are no sections to correct in the first case and the decoder is incapable of correcting too many sections in the second case. Therefore, the receiving circuitry, or at least the decoder, may be disabled to save battery power.

Claims (29)

1. A receiver adapted to receive multi-protocol encapsulation forward error correction frame type application data and encoded error correction data, and to correct erroneous sections in said application data, comprising:

an erasure structure list table for storing therein data relating to unreliable sections within the multi-protocol encapsulation forward error correction frame;

a data processing unit;

wherein said data processing unit is adapted to: (i) accept an indication per erroneous section; and (ii) cause said data relating to the unreliable sections to be stored in said erasure structure list table based on said indication(s); and

wherein the data contained in the erasure structure list table is utilized for performing handovers.

2. The receiver of claim 1 , wherein the data comprises, per erroneous section, the address of said section within the multi-protocol encapsulation forward error correction frame and the bit-wise length of said section.

3. The receiver of claim 1 , wherein data relating to an unreliable section is stored in the erasure structure list table if the unreliable section contains at least one error.

4. The receiver of claim 1 , wherein an error detection module provides the indication(s) for errors in erroneous section(s) by performing a cyclic redundancy check.

5. The receiver of claim 1 , wherein the size of the erasure structure list table is fixed.

6. The receiver of claim 1 , wherein the size of the erasure structure list table dynamically changes to accommodate for additional erroneous sections as they are detected.

7. The receiver of claim 1 , wherein the receiver complies with the digital video broadcast handheld (“DVB-H”) standard.

8. The receiver of claim 1 , wherein the receiver complies with the high-definition television (“HDTV”) standard.

9. The receiver of claim 1 , wherein the receiver complies with the Enhanced Packet Mode DAB standard.

10. The receiver of claim 1 , wherein the data contained in the erasure structure list table is utilized for diagnostics purposes in respect of the receiver's operation.

11. The receiver of claim 1 , wherein data contained in the erasure structure list table is used in a feedback loop(s) for controlling the operation of said receiver.

12. The receiver of claim 1 , wherein data contained in the erasure structure list table is used for monitoring impulsive interference(s).

13. The receiver of claim 1 , wherein the erasure structure list table and the multi-protocol encapsulation forward error correction frame are stored in and used by a host.

14. The receiver of claim 1 , wherein the receiver enters a sleep mode after receiving one multi-protocol encapsulation forward error correction frame.

15. The receiver of claim 1 , wherein the receiver enters a sleep mode after receiving multiple multi-protocol encapsulation forward error correction frames.

16. The receiver of claim 1 , wherein the receiver simultaneously receives and processes two or more frames belonging to different multi-protocol encapsulation forward error correction streams, and said receiver uniquely allocates an erasure structure list table to each of said stream.

17. The receiver of claim 16 , wherein the different multi-protocol encapsulation forward error correction streams are associated with different types of data or information.

18. The receiver of claim 16 , wherein the different multi-protocol encapsulation forward error correction streams are associated with the same type of data or information.

19. The receiver of claim 1 , wherein said data processing unit causes a decoder to correct erroneous sections based on the data stored in the erasure structure list.

20. The receiver of claim 19 , wherein said decoder is a Reed-Solomon decoder.

21. The receiver of claim 19 , wherein counters are assigned to respective rows in a multi-protocol encapsulation forward error correction frame, each of which is incremented every time an erroneous section is found which overlaps the respective row.

22. The receiver of claim 21 , wherein a row is corrected by the decoder if the entire multi-protocol encapsulation forward error correction frame has been checked and the respective counter has not reached a preset value.

23. The receiver of claim 19 , wherein the data processing unit checks the erasure structure list table, per received multi-protocol encapsulation forward error correction frame, and disables receiving circuitry and the decoder if said erasure structure list complies with a specified criterion.

24. The receiver of claim 23 , wherein the data processing unit enables said receiving circuitry and said decoder if, after reception of the entire application data table portion of the multi-protocol encapsulation forward error correction frame, the erasure structure list table does not comply with a predefined criterion.

25. The receiver of claim 24 , wherein the specified criterion is the erasure structure list table being either empty or full.

Assignments (6)
AMENDMENT TO LIEN AGREEMENT Recorded Nov 26, 2010
From: SIANO MOBILE SILICON LTD.
To: PLENUS II LIMITED PARTNERSHIP; PLENUS II (D.C.M.) LIMITED PARTNERSHIP; PLENUS III LIMITED PARTNERSHIP; PLENUS III (D.C.M.) LIMITED PARTNERSHIP; PLENUS III (2) LIMITED PARTNERSHIP; PLENUS III (C.I.) L.P.
Reel/Frame 025413/0501 →
CORRECTIVE ASSIGNMENT TO CORRECT THE RECEIVING PARTY DATA PREVIOUSLY REOCRDED ON REEL 024621 FRAME 0265. ASSIGNOR(S) HEREBY CONFIRM THE LIEN. Recorded Aug 18, 2010
From: SIANO MOBILE SILICON LTD.
To: PLENUS II, LIMITED PARTNERSHIP; PLENUS II (D.C.M.) LIMITED PARTNERSHIP; PLENUS III, LIMITED PARTNERSHIP; PLENUS III (D.C.M.) LIMITED PARTNERSHIP; PLENUS III (2) LIMITED PARTNERSHIP
Reel/Frame 024952/0900 →
LIEN Recorded Jul 1, 2010
From: SIANO MOBILE SILICON LTD.
To: PLENUS MANAGEMENT (2004) LTD.; PLENUS MANAGEMENT III 2007 LTD.
Reel/Frame 024621/0265 →
RELEASE OF SECURITY INTEREST Recorded Jun 30, 2010
From: KREOS CAPITAL II LIMITED
To: SIANO MOBILE SILICON LTD.
Reel/Frame 024614/0453 →
AMENDMENT TO U.S. INTELLECTUAL PROPERTY SECURITY AGREEMENT Recorded Jul 15, 2009
From: SIANO MOBILE SILICON LTD.
To: KREOS CAPITAL II LIMITED
Reel/Frame 022959/0070 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Jul 23, 2008
From: JASHEK, RONEN; OREN, ROY; IRONI, ALON; MEIRI, DROR
To: SIANO MOBILE SILICON LTD.
Reel/Frame 021275/0723 →
Continuity (1)
Related Publication 20090055715A1 · Feb 26, 2009