Common mode voltage extraction circuit

1. A device for extracting a common mode voltage of an input signal, comprising:

an operational amplifier having an output, at least one negative input and at least one positive input;

a first transistor, a first terminal of the first transistor being operably coupled to the output of the operational amplifier;

a second transistor, a terminal of the second transistor being operably coupled to a second terminal of the first transistor and the at least one positive input of the operational amplifier to create a negative feedback loop;

third and fourth transistors, a first terminal of the third transistor and a first terminal of the fourth transistor both being operably coupled to the at least one negative input; and

a common mode output, wherein the negative feedback loop extracts the common mode voltage of the input signal, the common mode voltage of the input signal being output at the common mode output.

2. The device of claim 1 , wherein the operational amplifier further comprises:

a current mirror.

3. The device of claim 2 , wherein a second terminal of the third transistor is operably coupled to a second terminal of the fourth transistor at a first node.

4. The device of claim 3 , further comprising:

a fifth transistor and a sixth transistor, a first terminal of the fifth transistor being operably coupled to a first terminal of the sixth transistor at a second node.

5. The device of claim 4 , wherein the current mirror comprises a seventh transistor and an eighth transistor, a first terminal of the seventh transistor being operably coupled to the first node, and a first terminal of the eighth transistor being operably coupled to the second node.

6. The device of claim 5 , wherein the operational amplifier further comprises:

a ninth transistor and a tenth transistor each having a first terminal coupled to a power supply voltage and a second terminal being coupled to ground, wherein, the ninth transistor and tenth transistor act as a load on the power supply, creating a current.

7. The device of claim 5 , wherein:

the at least one negative input comprises two negative inputs;

the input signal comprises a positive component having a positive component voltage and a negative component having a negative component voltage; and

the positive component and the negative component are each input into one of the two negative inputs.

8. The device of claim 5 , wherein a current at the first node is equal to a current at the second node.

9. The device of claim 7 , wherein:

a change in a voltage of the input signal creates a first change in a voltage at the first node;

the first change in the voltage at the first node creates an change in a current across the seventh transistor;

the change in current across the seventh transistor creates a second change in voltage at the first node, the second change being made until the voltage at the first node is to equal the voltage at the second node;

the second change in voltage at the first node creating a change in current across the first transistor;

the change in current across the first transistor creating a change in voltage at the common mode output.

10. The device of claim 9 , wherein the voltage at the common mode output is changed until the voltage at the common mode output is equal to

(

V

Input

+

+

V

Input

-

2

)

,

V

Input

+

being the positive component voltage and V Input− being the negative component voltage.

11. The device of claim 6 , wherein the first, second, third, fourth, fifth, sixth, seventh, eighth, ninth, and tenth transistors comprise field effect transistors (FETs).

12. The device of claim 11 , wherein:

the first transistor, the ninth transistor, and the tenth transistor comprise p-type FETs; and

the second transistor, the third transistor, the fourth transistor, the fifth transistor, the sixth transistor, the seventh transistor, and the eighth transistor comprise n-type FETs.

13. The device of claim 1 , wherein the device does not contain any resistors.

14. The device of claim 1 , wherein the device comprises a circuit which may be integrated into a larger integrated circuit, while only occupying a small die area of the integrated circuit.