Simultaneous control of multiple I/O banks in an I2C slave device
View Patent ↗Consistent with one example embodiment, communications systems, using a serial data transfer bus having a serial data line and a clock line used to implement a communications protocol, incorporate programmable loading of a logic value into parallel slave device registers. The communications system includes a slave device having two or more registers, each register having two or more bits, each register configured to load data therein received in accordance with the communications protocol over the data transfer bus in a first configuration, and to load a single logic value into the plurality of bits in a second configuration. A programmable configuration register is configured to be programmed, in accordance with the communications protocol over the data transfer bus, to select two or more of the registers in the second configuration.
1. In a communications system using a serial data transfer bus that has a serial data line and a clock line used to implement a communications protocol, a slave device, comprising:
a plurality of interface port registers, each interface port register comprising a plurality of bits, each interface port register configured to load data therein received in accordance with the communications protocol over the data transfer bus in a first configuration, and to load a single logic value into the plurality of bits in a second configuration; and
a programmable configuration register configured to be programmed, in accordance with the communications protocol over the data transfer bus, to select two or more of the plurality of interface port registers for loading of the single logic value into the plurality of bits of the selected interface port registers in the second configuration.
2. The device of claim 1 , wherein the configuration register is configured as an 8-bit register, wherein 1-bit is used to select the single logic value, and wherein 5-bits are used to select interface port registers desired for loading of the single logic value.
3. The device of claim 1 , wherein the slave device is configured as a general purpose input/output device.
4. The device of claim 1 , wherein the slave device is configured to conform to an SMBus serial communication protocol.
5. The device of claim 1 , wherein the slave device is configured as a general purpose input/output device comprising a plurality of pins, each pin associated with a bit of the plurality of bits, the plurality of pins divided into banks of output drivers, wherein each bank of output drivers is associated with one of the interface port registers.
6. The device of claim 5 , wherein the banks of output drivers are configured to drive light emitting diodes.
7. The device of claim 5 , wherein the banks of output drivers comprise four pins configured to drive seven-segment displays.
8. In a communications system using an I2C serial data transfer bus that has a serial data line and a clock line used to implement a communications protocol, a method for a master device to load data into at least two interface port registers in a slave device, comprising:
programming a configuration register in the slave device, in accordance with the communications protocol over the data transfer bus, to select at least two interface port registers from a plurality of selectable interface port registers;
selecting a logic value; and
loading the selected logic value into each of the selected at least two interface port registers concurrently.
9. The method of claim 8 , comprising driving a light emitting diode using an output port associated with the port register.
10. The method of claim 8 , comprising driving a seven-segment display using an output port associated with the port register.
11. The method of claim 8 , wherein the serial data transfer bus further conforms to an SMBus serial communication specification.
12. The method of claim 8 , wherein the slave device is configured as a general purpose input/output device.
13. A computer-readable medium having computer-executable instructions for a master device to concurrently load a selected logic value into at least two interface port registers in a slave device, the computer-executable instructions performing steps comprising:
programming a configuration register in the slave device, in accordance with the communications protocol over the data transfer bus, to select at least two interface port registers from a plurality of selectable interface port registers;
selecting a logic value; and
loading the selected logic value into each of the selected at least two interface port registers concurrently.
14. The computer-readable medium of claim 13 , wherein the computer-executable instructions conform to an SMBus serial communication protocol.
15. An I2C slave device, comprising:
means for programming a configuration register in the slave device, in accordance with the communications protocol over the data transfer bus, to select at least two interface port registers from a plurality of selectable interface port registers;
means for selecting a logic value; and
means for loading the selected logic value into each of the selected at least two interface port registers concurrently.
16. The device of claim 15 , comprising means for driving a light emitting diode using the interface port registers.
17. The device of claim 15 , comprising means for driving a seven-segment display using the interface port registers.