Memory controller and method for coupling a network and a memory
View Patent ↗A memory controller (SMC) is provided for coupling a memory (MEM) to a network (N; IM). The memory controller (SMC) comprises a first interface (PI) for connecting the memory controller (SMC) to the network (N; IM). The first interface (PI) is arranged for receiving and transmitting data streams (ST 1 -ST 4 ). A streaming memory unit (SMU) is coupled to the first interface (PI) for controlling data streams (ST 1 -ST 4 ) between the network (N; IM) and the memory (MEM). Said streaming memory unit (SMU) comprises a buffer (B) for temporarily storing at least part of the data streams (ST 1 -ST 4 ). A buffer managing unit (BMU) is provided for managing a temporarily storing of data streams (ST 1 -ST 4 ) in the buffer (B) in a first and second operation mode (1OM; 2OM). In the first operation mode (1OM), data from the data streams (ST 1 -ST 4 ) to be stored in the memory (MEM) are temporarily stored in the buffer (B) until a portion of the buffer (B) is occupied. In the second operation mode (2OM), after the portion of the buffer (B) is occupied, the buffer managing unit (BMU) divides the buffer (B) into a pre-fetch buffer (PFB) for buffering pre-fetched data from the memory (MEM) and a write-back buffer (WBB) for buffering data to be written back to the memory (MEM).
1. A memory controller for coupling a memory to a network comprising:
a first interface for connecting the memory controller to the network, the first interface being arranged for receiving and transmitting data streams; and
a streaming memory unit coupled to the first interface for controlling the data streams between the network and the memory, said streaming memory unit comprises a buffer for temporarily storing at least part of the data streams, and a buffer managing unit for managing a temporary storing of the data streams in the buffer in a first and second operation mode;
wherein in the first operation mode, data from the data streams to be stored in the memory are temporarily stored in the buffer until a portion of the buffer is occupied;
wherein in the second operation mode, after the portion of the buffer is occupied, the buffer managing unit divides the buffer into a pre-fetch buffer for buffering pre-fetched data from the memory and a write-back buffer for buffering data to be written back to the memory.
2. A memory controller according to claim 1 , wherein the first interface is a PCI express interface.
3. A memory controller according to claim 1 , further comprising a second interface coupled to the streaming memory unit for connecting the memory controller to the memory, and for exchanging data with the memory in bursts.
4. A memory controller according to claim 1 , wherein
the buffer managing unit comprises, in the first operation mode, a start address register for storing a start address of the buffer, an end address register for storing an end address of the buffer, a read pointer register for storing a read pointer for the buffer, and a write pointer register for storing a write pointer for the buffer; and
the buffer managing unit comprises, in the second operation mode, a start address register for storing a start address of the buffer, an end address register for storing an end address of the buffer, a pre-fetch start address register for storing a pre-fetch start address, a pre-fetch end address register for storing a pre-fetch end address, a pre-fetch read pointer register for storing a pre-fetch read pointer, a pre-fetch write pointer register for storing a pre-fetch write pointer, a write-back read pointer register for storing a write-back read pointer, and a write-back write pointer register for storing a write-back write pointer.
5. A memory controller according to claim 1 , wherein the buffer managing unit is adapted to determine the transition from the first to the second operation mode dynamically.
6. Data processing system comprising a network having processing unit, and an interconnect means for coupling the processing units, and a memory controller according to claim 1 .
7. A method for coupling a memory to a network, comprising the steps of:
receiving and transmitting data streams via a first interface for connecting a memory controller to the network;
controlling the data streams between the network and the memory by a streaming memory unit;
temporarily storing at least part of the data streams in a buffer;
managing the temporary storing of the data streams in the buffer in a first and second operation mode;
in the first operation mode temporarily storing data from the data streams to be stored in the memory until a portion of the buffer is occupied, in the second operation mode after the portion of the buffer is occupied, dividing the buffer into a pre-fetch buffer for buffering pre-fetch data from the memory and a write-back buffer for buffering data to be written back to the memory.