IP Library Granted Patent US 9,334,167
Granted Patent B2
US 9,334,167 · App. 11/920,280 · Granted May 10, 2016

Nanostructure production methods and apparatus

Inventors: Sembukutiarachilage Ravi Silva (Camberley, GB); Ben Poul Jensen (Seaford, GB); Guan Yow Chen (Guildford, GB)
Assignee: SURREY NANOSYSTEMS LIMITED
C01B31/0233B82Y30/00B82Y40/00C23C16/46Y10T428/265
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Quick Facts
Patent No.
US 9,334,167
App. No.
11/920,280
Granted
May 10, 2016
Kind
B2
Abstract

The present invention relates to a method of forming nanostructures or nanomaterials. The method comprises providing a thermal control barrier on a substrate and forming the nanostructures or nanomaterials. The method may, for example, be used to form carbon nanotubes by plasma enhanced chemical vapor deposition using a carbon containing gas plasma: The temperature of the substrate may be maintained at less than 350° C. while the carbon nanotubes are formed.

Claims (31)

1. A method of forming nanostructures or nanomaterials including the steps of:

providing a thermal control barrier as a substantially continuous layer on a substrate;

providing a gas plasma;

providing heating at the thermal control barrier from above the layer by a heating source distinct from the gas plasma, wherein the heating source is an optical heating source; and

forming the nanostructures or nanomaterials on the substrate atop the layer by plasma enhanced chemical vapour deposition using the gas plasma during said heating.

2. A method according to claim 1 , wherein the method is for producing nanostructures which are carbon nanotubes or carbon nanowires and wherein the step of forming the nanostructures uses a carbon containing gas plasma.

3. A method according to claim 1 , wherein the temperature of the substrate is less than 350° C. while the nanostructures or nanomaterials are formed.

4. A method according to claim 1 , wherein a catalyst is provided on the thermal control barrier in a substantially continuous layer before the nanostructures or nanomaterials are formed or simultaneously with the formation of the nanostructures or nanomaterials.

5. A method according to claim 1 , wherein the thermal control barrier is deposited on the substrate.

6. A method according to claim 1 , wherein the thermal control barrier has a thickness of greater than or equal to 3 nm.

7. A method according to claim 1 , wherein the thermal control barrier is a layer of metal, semiconductor or dielectric material.

8. A method according to claim 1 , comprising the step of providing a catalyst on the thermal control barrier.

9. A method according to claim 8 , wherein the catalyst is a metal, or mixture of metals.

10. A method according to claim 1 , further comprising the step of uniformly cooling the substrate.

11. A method according to claim 10 , wherein a second surface of the substrate is cooled while said nanostructures or nanomaterials are formed on a first surface of said substrate.

12. A method according to claim 11 , comprising supplying a coolant fluid to a cooling well to cool the substrate.

13. A method according to claim 11 , comprising the step of introducing a gas at the interface between said second surface and a surface on which the substrate is supported.

14. A method according to claim 13 , wherein said gas is hydrogen.

15. A method according to claim 10 , comprising supplying a coolant fluid to a cooling well to cool the substrate.

16. A method according to claim 15 , comprising the step of introducing a gas at the interface between said second surface and a surface on which the substrate is supported.

17. A method according to claim 16 , wherein said gas is hydrogen.

18. A method according to claim 1 , wherein said thermal control barrier is optically reflective.

19. A method according to claim 1 , wherein the thermal control barrier is a thermal insulator.

20. A method according to claim 1 , comprising providing at least one device on the substrate.

21. A method according to claim 20 , wherein the thermal control barrier is provided over said at least one device.

22. A method according to claim 21 , wherein said at least one device is at least substantially covered by said thermal control barrier.

23. A method according to claim 20 , wherein the device is an electronic component.

24. A method according to claim 23 , wherein the electronic component is a transistor.

25. A method according to claim 1 , wherein the steps are repeated to form a multilayered structure.

26. A method according to claim 1 , wherein said substrate is a plastics material.

27. A method according to claim 1 , further comprising the step of controlling an electric field across the substrate to align the nanostructures or nanomaterials.

Assignments (1)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Apr 1, 2008
From: SILVA, SEMBUKUTIARACHILAGE RAVI; JENSEN, BEN PAUL; CHEN, GUAN YOW
To: SURREY NANOSYSTEMS LIMITED
Reel/Frame 020732/0692 →
Priority Claims (1)
GB 0509499.0 · May 11, 2005 · national
Continuity (1)
Related Publication 20090061217A1 · Mar 5, 2009