IP Library Granted Patent US 7,719,386
Granted Patent B2
US 7,719,386 · App. 11/923,092 · Granted May 18, 2010

Phase shifter having components which suppress fluctuations in the phase shifter pass characteristics

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Quick Facts
Patent No.
US 7,719,386
App. No.
11/923,092
Granted
May 18, 2010
Kind
B2
Abstract

A phase shifter selectively switches between a low-pass filter 13 and a high-pass filter 12 using single pole double throw switches 10 a and 10 b provided on the input and output sides, respectively, and operatively linked to each other. The single pole double throw switches 10 a and 10 b include FETs Q 1 c and Q 1 d that connect single pole side junctions and the low-pass filter, respectively, and inductance circuits (L 1 c and R 2 c , and L 1 d and R 2 d ) connected in parallel with FETs Q 1 c and Q 1 d , respectively. The inductance circuits are respectively comprised of the inductor L 1 c and the resistor R 2 c connected in series and of the inductor L 1 d and the resistor R 2 d connected in series.

Claims (34)

1. A phase shifter comprising:

a low-pass filter;

a high-pass filter;

first and second single pole double throw switches provided on input and output sides of the low-pass filter and the high-pass filter respectively and operatively linked to each other, wherein the first and second single pole double throw switches each comprising:

a first switch device that connects a single pole side junction node and said low-pass filter;

a first inductance circuit connected in parallel with said first switch device;

a second switch device that connects said single pole side junction node and said high-pass filter and that performs an ON/OFF operation exclusively from said first switch device; and

a second inductance circuit connected in parallel with said second switch device;

each said first inductance circuit being constituted by a serially-connected circuit of an inductor and a resistor,

wherein the inductance of the inductor and the resistance of the resistor of each of the first inductance circuit and the capacitance of each said first switch device in an off state are selected so as to suppress fluctuation in the pass characteristics of the phase shifter.

2. The phase shifter as defined in claim 1 , wherein

each said first switch device is connected to a single pole side junction node and said low-pass filter on an input side and output side, respectively;

each said first inductance circuit is connected in parallel with each said first switch device on the input side and output side, respectively;

each said second switch device is connected to said single pole side junction node and said high-pass filter on the input side and output side, respectively; and

each said second inductance circuit is connected in parallel with each said second switch device on the input side and output side, respectively.

3. The phase shifter as defined in claim 1 , wherein, when the inductance of each said inductor is L, the resistance of each said resistor is R, and the capacitance of each said first switch device in an off state is C in each said first inductance circuit, R is larger than 0 and smaller than (L/C) 1/2 .

4. The phase shifter as defined in claim 1 , wherein each said resistor is a parasitic resistance of each said inductor.

5. The phase shifter as defined in claim 1 , wherein each said inductor and each said resistor are made up of a material having an electrical resistivity higher than that of gold.

6. The phase shifter as defined in claim 1 , wherein each said inductor is made up of a material having an electrical resistivity equal to or lower than that of gold.

7. The phase shifter as defined in claim 1 , wherein each of said first and second switch devices are constituted by respective field-effect transistors.

8. A phase shifter comprising:

a low-pass filter and a high-pass filter; first single pole double throw switches and second single pole double throw switches provided on input side and output side respectively of said low-pass filter and said high-pass filter, respectively; said first and second single pole double throw switches selectively switching between said low-pass filter and said high-pass filter; wherein

said first and second single pole double throw switches disposed on the input side and output side include:

a first switch device that connects a single pole side junction node and said low-pass filter each on the input side and output side, respectively;

a first inductance circuit connected in parallel with said first switch device each on the input side and output side, respectively;

a second switch device that connects said single pole side junction node, each on the input side and output side, respectively, and said high-pass filter, said second switch device performs an ON/OFF operation exclusively from said first switch device; and

a second inductance circuit connected in parallel with said second switch device each on the input side and output side, respectively;

said first inductance circuit each being constituted by a serially-connected circuit of an inductor and a resistor,

wherein the inductance of the inductor and the resistance of the resistor of the first inductance circuit and the capacitance of the first switch device in an off state are selected so as to suppress fluctuation in the pass characteristics of the phase shifter.

9. The phase shifter as defined in claim 8 , wherein said first and second switch devices are constituted by respective field-effect transistors.

10. The phase shifter as defined in claim 8 , wherein said inductor is made up of a material having an electrical resistivity equal to or lower than that of gold.

11. The phase shifter as defined in claim 8 , wherein, when the inductance of said inductor is L, the resistance of said resistor is R, and the capacitance of said first switch device in an off state is C in said first inductance circuit, R is larger than 0 and smaller than (L/C) 1/2 .

12. The phase shifter as defined in claim 8 , wherein said resistor is a parasitic resistance of said inductor.

13. The phase shifter as defined in claim 8 , wherein said inductor and said resistor are made up of a material having an electrical resistivity higher than that of gold.

Assignments (2)
CHANGE OF NAME Recorded Nov 2, 2010
From: NEC ELECTRONICS CORPORATION
To: RENESAS ELECTRONICS CORPORATION
Reel/Frame 025235/0321 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Oct 24, 2007
From: ATSUMO, TAKAO; MIZUTANI, HIROSHI; MIYA, TATSUYA
To: NEC ELECTRONICS CORPORATION
Reel/Frame 020007/0443 →