System and method for interleaving point-of-load regulators
View Patent ↗A system and method for providing interleaving point-of-load (POL) regulators such that each regulator's switching cycle is phase displaced with respect to those of other POL regulators in the array is disclosed. As a result, the aggregate input and/or output reflected ripple and noise of the input, output, or both is reduced. Each regulator in the array is associated with an unique address. A serial data-line writes the phase spacing programmed to each addressable POL regulator in the array. The present invention permits phase displacement of POL regulators without limitation to the input and output voltages of each of the regulators in the array. The array of POL regulators may also operate in a phase displaced mode with only a single control line. The need for separate controllers and multiple control lines is thereby eliminated.
1. A method for interleaving a plurality of switched-mode voltage regulators, comprising the steps of:
selecting a phase displacement for each voltage regulator;
generating a synchronization signal;
communicating the synchronization signal to the plurality of voltage regulators simultaneously;
generating a trigger signal for at least one of the plurality of voltage regulators that is phase displaced from the synchronization signal by the selected phase displacement and synchronized to a selected frequency multiple of the synchronization signal;
providing a phase-displaced switching frequency based on the trigger signal; and
operating the at least one of the plurality of voltage regulators using the phase-displaced switching frequency.
2. The method of claim 1 , further comprising assigning an address for each voltage regulator.
3. The method of claim 2 , wherein the phase displacement for a selected voltage regulator is based on the address of the selected voltage regulator.
4. The method of claim 1 , further comprising transmitting the phase displacement for the selected voltage regulator to the selected voltage regulator.
5. The method of claim 1 , further comprising:
receiving an input voltage via a common input bus; and
providing a single multi-phase voltage output.
6. The method of claim 1 , further comprising:
receiving a plurality of input voltages; and
providing a plurality of output voltages, wherein each output voltage is phase displaced with respect to each other.
7. The method of claim 1 , further comprising:
receiving a plurality of input voltages; and
providing a single multi-phase voltage output.