Trench gate-type MOSFET device and method for manufacturing the same
View Patent ↗A semiconductor device includes a first conduction type semiconductor substrate, a second conduction type base region in the substrate, a high concentration first conduction type source region in the base region, and first and second trenches. The source region is formed in an opposite side of the substrate. The first and second trenches pass through the source region and the base region, and the first and second trenches have different widths and shapes, respectively.
1. A semiconductor device comprising:
a first conduction type semiconductor substrate;
a second conduction type base region in the substrate;
a high concentration first conduction type source region in the base region, the source region being in an opposite side of the substrate; and
first and second trenches passing through the source region and the base region, respectively, the first and second trenches having different widths and shapes; wherein the first trench has a cylindrical shape, the second trench has a quadrangular shape, and the first and second trenches are alternately arranged.
2. The device according to claim 1 , wherein the first trench has a diameter greater than that of the second trench.
3. The device according to claim 1 , wherein the second trench has a length smaller than a diameter of the first trench.
4. A method of manufacturing a semiconductor device, comprising:
selectively implanting second conduction type impurities into a first conduction type semiconductor substrate to form a second conduction type base region having a predetermined depth in the substrate;
forming a high concentration first conduction type source region in a surface of the base region that is opposite to the substrate; and
forming first and second trenches passing through the source region and the base region, respectively, and having different widths and shapes; wherein the first trench has a cylindrical shape, the second trench has a quadrangular shape, and the first and second trenches are alternately arranged.
5. The method according to claim 4 , wherein the first trench has a diameter greater than that of the second trench.
6. The method according to claim 4 , wherein the second trench has a length smaller than a diameter of the first trench.
7. A semiconductor device comprising:
a substrate;
an epitaxial layer;
a gate and a source region;
the gate comprising a plurality of trenches alternately arranged and having different widths, wherein the plurality of trenches comprise a first trench having a cylindrical shape and a second trench having a quadrangular shape.
8. The device according to claim 7 , wherein the trenches comprise at least one of a cylindrical first trench and a quadrangular second trench, and a width of the first trench is greater than that of the second trench.
9. The device according to claim 7 , wherein the trenches comprise a plurality of trenches having different widths, the trenches being successively arranged.
10. The device according to claim 7 , wherein the trenches comprise a plurality of trenches adjacent to each other.
11. The device according to claim 7 , wherein the trenches comprise two trenches having different widths, and alternately arranged one by one.
12. The device according to claim 7 , wherein the trenches comprise a plurality of trenches having different widths, with respect to both a horizontal direction and a vertical direction.
13. The device according to claim 7 , wherein the plurality of trenches having different widths, are connected to each other.